Overview

Supported ICs[ RTL8721F ]

Ameba series chips integrate an IEEE 802.3 compliant MAC (Media Access Control) controller and connect to an external PHY (Physical Layer) chip through the RMII (Reduced Media Independent Interface) to access the physical network.

Features

  • Supports the RMII interface, 10/100 Mbps speed, and full-duplex and half-duplex modes

  • Supports managing the external PHY through the SMI (MDC/MDIO) interface

  • Supports multiple operating modes

    • MAC to PHY, connected to an external PHY

    • MAC to MAC, directly interconnected with a peer MAC

  • Supports multiple clock schemes

    • 50 MHz clock divided from the internal PLL

    • 50 MHz clock input on the EXTCLK pin

    • 25 MHz or 50 MHz clock output to the PHY on the EXTCLK pin

  • Supports automatic padding to the minimum frame length and CRC appending on transmit, and automatic CRC checking on receive

  • Supports hardware calculation and checking of IPv4 header, TCP, and UDP checksums

  • Supports IEEE 802.3x flow control

  • Supports destination address filtering of received frames (unicast, multicast, broadcast, and promiscuous mode)

  • Supports hardware processing of VLAN tags

    • Transmit direction: insert, remove, and rewrite tags

    • Receive direction: strip tags

  • Supports receive interrupt coalescing

  • Supports Energy Efficient Ethernet (EEE)

  • Supports loopback test