Wakeup Source and Reason

Wakeup Source

RTL8721Dx:

The following table lists the wakeup sources that can be used to wake up the system under different power modes.

Wakeup source	Sleep CG	Sleep PG	Deep Sleep	Restriction
WLAN	√	√	X
BT	√	√	X
IPC	√	√	X	Only KM0 can use the IPC to wake up KM4.
Basic Timer4~7	√	√	X
PMC Timer	√	√	X	For internal usage
UART0~2	√	√	X	When using UART as a wakeup source, the Rx clock source can only be OSC2M, and do not turn off OSC4M during sleep. When the baudrate is larger than 115200, it is not recommended to use UART as a wakeup source. The portion of the command used to wake up that exceeds the FIFO depth (64B) will be lost.
LOGUART	√	√	X	When using LOGUART as a wakeup source: If the Rx clock source is XTAL40M, do not turn off XTAL or OSC4M during sleep. If the Rx clock source is OSC2M, do not turn off OSC4M during sleep. The portion of the command used to wake up that exceeds the FIFO depth (16B) will be lost.
GPIO	√	√	X
I2C	√	√	X
CAP_TOUCH	√	√	X
ADC	√	√	X
SDIO	√	√	X
Key-Scan	√	√	X
BOR	√	√	√
PWR_DOWN	√	√	√
AON_TIMER	√	√	√
AON_WAKEPIN	√	√	√
RTC	√	√	√

RTL8720E:

The following table lists the wakeup sources that can be used to wake up the system under different power modes.

Wakeup source	Sleep CG	Sleep PG	Deep-Sleep	Restriction
WLAN	√	√	X
BT	√	√	X
IWDG	√	√	X
IPC	√	√	X
Basic Timer	√	√	X
UART	√	√	X	When using UART as a wakeup source, if the Rx clock source is XTAL40M, do not turn off XTAL during sleep. The portion of the command used to wake up that exceeds the FIFO depth (64B) will be lost.
LOGUART	√	√	X	When using LOGUART as a wakeup source, if the Rx clock source is XTAL40M, do not turn off XTAL during sleep. The portion of the command used to wake up that exceeds the FIFO depth (16B) will be lost.
GPIO	√	√	X
SPI	√	X	X	When using SPI as a wakeup source, do not turn off the power and clock of SOC domain. Only when the NP core is active and AP core is sleep, NP can use the SPI to wake up AP.
CAP_TOUCH	√	√	X
ADC	√	√	X
VAD	√	X	X
BOR	√	√	√
PWR_DOWN	√	√	√
AON_TIMER	√	√	√
AON_WAKEPIN	√	√	√
RTC	√	√	√

RTL8710E:

The following table lists the wakeup sources that can be used to wake up the system under different power modes.

Wakeup source	Sleep CG	Sleep PG	Deep-Sleep	Restriction
WLAN	√	√	X
BT	√	√	X
IWDG	√	√	X
IPC	√	√	X
Basic Timer	√	√	X
UART	√	√	X	When using UART as a wakeup source, if the Rx clock source is XTAL40M, do not turn off XTAL during sleep. The portion of the command used to wake up that exceeds the FIFO depth (64B) will be lost.
LOGUART	√	√	X	When using LOGUART as a wakeup source, if the Rx clock source is XTAL40M, do not turn off XTAL during sleep. The portion of the command used to wake up that exceeds the FIFO depth (16B) will be lost.
GPIO	√	√	X
SPI	√	X	X	When using SPI as a wakeup source, do not turn off the power and clock of SOC domain. Only when the NP core is active and AP core is sleep, NP can use the SPI to wake up AP.
CAP_TOUCH	√	√	X
ADC	√	√	X
VAD	√	X	X
BOR	√	√	√
PWR_DOWN	√	√	√
AON_TIMER	√	√	√
AON_WAKEPIN	√	√	√
RTC	√	√	√

RTL8726E:

The following table lists the wakeup sources that can be used to wake up the system under different power modes.

Wakeup source	Sleep CG	Sleep PG	Deep-Sleep	Restriction
WLAN	√	√	X
BT	√	√	X
IWDG	√	√	X
IPC	√	√	X
Basic Timer	√	√	X
UART	√	√	X	When using UART as a wakeup source, if the Rx clock source is XTAL40M, do not turn off XTAL during sleep. The portion of the command used to wake up that exceeds the FIFO depth (64B) will be lost.
LOGUART	√	√	X	When using LOGUART as a wakeup source, if the Rx clock source is XTAL40M, do not turn off XTAL during sleep. The portion of the command used to wake up that exceeds the FIFO depth (16B) will be lost.
GPIO	√	√	X
SPI	√	X	X	When using SPI as a wakeup source, do not turn off the power and clock of SOC domain. Only when the NP core is active and AP core is sleep, NP can use the SPI to wake up AP.
CAP_TOUCH	√	√	X
ADC	√	√	X
VAD	√	X	X
BOR	√	√	√
PWR_DOWN	√	√	√
AON_TIMER	√	√	√
AON_WAKEPIN	√	√	√
RTC	√	√	√

RTL8713E:

The following table lists the wakeup sources that can be used to wake up the system under different power modes.

Wakeup source	Sleep CG	Sleep PG	Deep-Sleep	Restriction
WLAN	√	√	X
BT	√	√	X
IWDG	√	√	X
IPC	√	√	X
Basic Timer	√	√	X
UART	√	√	X	When using UART as a wakeup source, if the Rx clock source is XTAL40M, do not turn off XTAL during sleep. The portion of the command used to wake up that exceeds the FIFO depth (64B) will be lost.
LOGUART	√	√	X	When using LOGUART as a wakeup source, if the Rx clock source is XTAL40M, do not turn off XTAL during sleep. The portion of the command used to wake up that exceeds the FIFO depth (16B) will be lost.
GPIO	√	√	X
SPI	√	X	X	When using SPI as a wakeup source, do not turn off the power and clock of SOC domain. Only when the NP core is active and AP core is sleep, NP can use the SPI to wake up AP.
CAP_TOUCH	√	√	X
ADC	√	√	X
VAD	√	X	X
BOR	√	√	√
PWR_DOWN	√	√	√
AON_TIMER	√	√	√
AON_WAKEPIN	√	√	√
RTC	√	√	√

RTL8730E:

The following table lists the wakeup sources that can be used to wake up the system under different power modes.

Wakeup source	Sleep CG	Sleep PG	Deep-Sleep	Restriction
WLAN	√	√	X
BT	√	√	X
AON_WAKEPIN	√	√	√
UART	√	√	X	When using UART as a wakeup source: If the Rx clock source is XTAL40M, do not turn off XTAL during sleep. If the Rx clock source is OSC2M, do not turn off OSC4M during sleep. The portion of the command used to wake up that exceeds the FIFO depth (64B) will be lost.
IPC	√	√	X	The IPC can only wake up CA32 and KM4, but not KM0.
SPI	√	X	X	Do not turn off SOC domain clock and power when using SPI as wakeup source
USB	√	X	X
VAD	√	√	X
BOR	√	√	√
PWR_DOWN	√	√	√
CAP_TOUCH	√	√	X
ADC	√	√	X
RTC	√	√	√
GPIO	√	√	X
LOGUART	√	√	X	When using LOGUART as a wakeup source: If the Rx clock source is XTAL40M, do not turn off XTAL during sleep. If the Rx clock source is OSC2M, do not turn off OSC4M during sleep. The portion of the command used to wake up that exceeds the FIFO depth (16B) will be lost.
Basic Timer	√	√	X
IWDG	√	√	X
AON_TIMER	√	√	√

A hardware SYSON power management control module (SYSON PMC) is designed to control the clock and power of LP, and then LP controls the clock and power of NP and AP. When the system enters sleep mode, CPUs can select to enter clock-gating (CG) or power-gating (PG) mode, while SYSON PMC maintained active to wake up LP when wakeup sources are triggered.

RTL8721F:

The following table lists the wakeup sources that can be used to wake up the system under different power modes.

Wakeup source	Sleep CG	Sleep PG	Deep-Sleep	Restriction
WLAN	√	√	X
BT	√	√	X
IPC	√	√	X
Basic Timer	√	√	X
UART	√	√	X	When UART0~UART3 are used as wakeup sources: If the Rx clock source is XTAL40M, disable XTAL40M and OSC4M during sleep. If the Rx clock source is OSC2M, disable OSC4M during sleep. When the wakeup command exceeds the 64-byte FIFO depth, the excess will be lost.
LOGUART	√	√	X	When LOGUART is used as wakeup source: If Rx clock source is XTAL40M, disable XTAL40M and OSC4M during sleep. If Rx clock source is OSC2M, disable OSC4M during sleep. When the wakeup instruction exceeds 16 bytes FIFO depth, the excess will be lost.
GPIO	√	√	X
RMII	√	X	X
CAP-TOUCH	√	√	X
CAN	√	X	X	Only supporting clock gating, the voltage needs to be maintained at 0.8V, and OSC4M needs to be turned on
IWDG	√	√	X
ADC	√	√	X
SDIO	√	X	X	Requires PLL to work properly
USB	√	X	X
AON_TIMER	√	√	√
AON_WAKEPIN	√	√	√
RTC	√	√	√
BOR	√	√	√
PWR_DOWN	√	√	√

Wakeup Reason

Note

When wakeup, the corresponding peripheral interrupt will be raised; when clearing the interrupt, the corresponding bit in wakeup reason will also be cleared. Thus it is not possible to get the wakeup reason after the interrupt is cleared.

RTL8721Dx:

SOCPS_AONWakeReason

Items	Description
Introduction	Get the deep-sleep wakeup reason
Parameter	None
Return	Bit[0]: CHIP_EN short press Bit[1]: CHIP_EN long press Bit[2]: BOR Bit[3]: AON Timer Bit[5:4]: AON GPIO Bit[8]: RTC

WAK_STATUS0

The following register can be used to get the sleep wakeup reason.

Register	Parameters
WAK_STATUS0	Bit[1:0]: WLAN Bit[2]: KM4_WAKE Bit[3]: BT_WAKE_HOST Bit[4]: IPC_KM4 Bit[9:6]: BASIC TIMER4~7 Bit[11:10]: PMC TIMER0~1 Bit[14:12]: UART0~2 Bit[15]: UART_LOG Bit[16]: GPIOA Bit[17]: GPIOB Bit[19:18]:I2C0~1 Bit[20]: Cap-Touch Bit[21]: RTC Bit[22]: ADC Bit[24]: BOR Bit[25]: PWR_DOWN Bit[26]: Key-Scan Bit[27]: AON_Timer Bit[28]: AON_Wakepin Bit[29]: SDIO

RTL8720E:

SOCPS_AONWakeReason

Items

Description

Introduction

Get the deep-sleep wakeup reason

Parameter

None

Return

Bit[0]: CHIP_EN short press

Bit[1]: CHIP_EN long press

Bit[2]: BOR

Bit[3]: AON Timer

Bit[5:4]: AON GPIO

Bit[8]: RTC

WAK_STATUS0 & WAK_STATUS1

The following registers can be used to obtain the wakeup reason.

Register	Parameters
WAKE_STATUS0	Bit[1:0]: WLAN Bit[2]: AP_WAKE Bit[3]: DSP_WAKE Bit[4]: BT_WAKE_HOST Bit[5]: IPC_KR4 Bit[6]: IPC_KM4 Bit[7]: IPC_DSP Bit[8]: WDG0 Bit[16:9]: Basic Timer0~7 Bit[20:17]: UART0~3 Bit[21]: LOG_UART Bit[22]: GPIOA Bit[23]: GPIOB Bit[24]: Cap_touch Bit[26:25]: SPI0~SPI1 Bit[27]: RTC Bit[28]: ADC Bit[30]: BOR Bit[31]: PWR_DOWN
WAKE_STATUS1	Bit[0]: AON_TIMER Bit[1]: AON_WAKEPIN Bit[2]: VAD

RTL8710E:

SOCPS_AONWakeReason

Items

Description

Introduction

Get the deep-sleep wakeup reason

Parameter

None

Return

Bit[0]: CHIP_EN short press

Bit[1]: CHIP_EN long press

Bit[2]: BOR

Bit[3]: AON Timer

Bit[5:4]: AON GPIO

Bit[8]: RTC

WAK_STATUS0 & WAK_STATUS1

The following registers can be used to obtain the wakeup reason.

Register	Parameters
WAKE_STATUS0	Bit[1:0]: WLAN Bit[2]: AP_WAKE Bit[3]: DSP_WAKE Bit[4]: BT_WAKE_HOST Bit[5]: IPC_KR4 Bit[6]: IPC_KM4 Bit[7]: IPC_DSP Bit[8]: WDG0 Bit[16:9]: Basic Timer0~7 Bit[20:17]: UART0~3 Bit[21]: LOG_UART Bit[22]: GPIOA Bit[23]: GPIOB Bit[24]: Cap_touch Bit[26:25]: SPI0~SPI1 Bit[27]: RTC Bit[28]: ADC Bit[30]: BOR Bit[31]: PWR_DOWN
WAKE_STATUS1	Bit[0]: AON_TIMER Bit[1]: AON_WAKEPIN Bit[2]: VAD

RTL8726E:

SOCPS_AONWakeReason

Items

Description

Introduction

Get the deep-sleep wakeup reason

Parameter

None

Return

Bit[0]: CHIP_EN short press

Bit[1]: CHIP_EN long press

Bit[2]: BOR

Bit[3]: AON Timer

Bit[5:4]: AON GPIO

Bit[8]: RTC

WAK_STATUS0 & WAK_STATUS1

The following registers can be used to obtain the wakeup reason.

Register	Parameters
WAKE_STATUS0	Bit[1:0]: WLAN Bit[2]: AP_WAKE Bit[3]: DSP_WAKE Bit[4]: BT_WAKE_HOST Bit[5]: IPC_KR4 Bit[6]: IPC_KM4 Bit[7]: IPC_DSP Bit[8]: WDG0 Bit[16:9]: Basic Timer0~7 Bit[20:17]: UART0~3 Bit[21]: LOG_UART Bit[22]: GPIOA Bit[23]: GPIOB Bit[24]: Cap_touch Bit[26:25]: SPI0~SPI1 Bit[27]: RTC Bit[28]: ADC Bit[30]: BOR Bit[31]: PWR_DOWN
WAKE_STATUS1	Bit[0]: AON_TIMER Bit[1]: AON_WAKEPIN Bit[2]: VAD

RTL8713E:

SOCPS_AONWakeReason

Items

Description

Introduction

Get the deep-sleep wakeup reason

Parameter

None

Return

Bit[0]: CHIP_EN short press

Bit[1]: CHIP_EN long press

Bit[2]: BOR

Bit[3]: AON Timer

Bit[5:4]: AON GPIO

Bit[8]: RTC

WAK_STATUS0 & WAK_STATUS1

The following registers can be used to obtain the wakeup reason.

Register	Parameters
WAKE_STATUS0	Bit[1:0]: WLAN Bit[2]: AP_WAKE Bit[3]: DSP_WAKE Bit[4]: BT_WAKE_HOST Bit[5]: IPC_KR4 Bit[6]: IPC_KM4 Bit[7]: IPC_DSP Bit[8]: WDG0 Bit[16:9]: Basic Timer0~7 Bit[20:17]: UART0~3 Bit[21]: LOG_UART Bit[22]: GPIOA Bit[23]: GPIOB Bit[24]: Cap_touch Bit[26:25]: SPI0~SPI1 Bit[27]: RTC Bit[28]: ADC Bit[30]: BOR Bit[31]: PWR_DOWN
WAKE_STATUS1	Bit[0]: AON_TIMER Bit[1]: AON_WAKEPIN Bit[2]: VAD

RTL8730E:

SOCPS_AONWakeReason

Items

Description

Introduction

Get the deep-sleep wakeup reason

Parameter

None

Return

Bit[0]: CHIP_EN short press

Bit[1]: CHIP_EN long press

Bit[2]: BOR

Bit[3]: AON Timer

Bit[7:4]: AON GPIO

Bit[8]: RTC

WAK_STATUS0

The following register can be used to get the sleep wakeup reason.

Register	Parameters
WAK_STATUS0	Bit[1:0]: WLAN Bit[2]: AON_TIMER Bit[3]: NP_WAKE Bit[4]: AP_WAKE Bit[5]: IWDG0 Bit[13:6]: BASIC TIMER0~7 Bit[14]: UART_LOG Bit[17:15]: GPIO Bit[18]: RTC Bit[19]: Cap-Touch Bit[20]: ADC Bit[22]: BOR Bit[23]: PWR_DOWN Bit[24]: VAD Bit[25]: IPC_NP Bit[26]: IPC_AP Bit[29:28]: SPI0~1 Bit[31:30]: UART0~1
WAK_STATUS1	Bit[0]: UART2 Bit[5]: AON_WAPEPIN Bit[6]: BT_WAKE_HOST

RTL8721F:

SOCPS_AONWakeReason

Item	Description
Function	Get the reason for waking up from deep sleep
Parameter	None
Return Value	Bit[0]: CHIP_EN short press Bit[1]: CHIP_EN long press Bit[2]: Power-down reset Bit[3]: AON timer Bit[7:4]: AON GPIO Bit[8]: RTC Bit[8]: 131K detection interrupt

WAK_STATUS0 & WAK_STATUS1

The following registers can be used to obtain the wakeup reason.

Register	Parameters
WAK_STATUS0	Bit[1:0]: WLAN Bit[2]: AP_WAKE Bit[3]: IPC_CPU0 Bit[4]: IPC_CPU1 Bit[5]: IWDG Bit[9:6]: Basic TIMER0~3 Bit[11:10]: PMC TIMER0~1 Bit[15:12]: UART0~3 Bit[16]: UART_LOG Bit[17]: GPIOA Bit[18]: GPIOB Bit[19]: GPIOC Bit[22]: RTC Bit[23]: ADC Bit[25]: Cap-Touch Bit[26]: BOR Bit[27]: PWR_DOWN Bit[28]: RMII Bit[29]: AON_Timer
WAK_STATUS1	Bit[0]: AON WAKEPIN Bit[1]: SDIO_WIFI Bit[2]: SDIO_BT Bit[3]: SDIO_HOST Bit[4]: USB Bit[6:5]: CAN0~CAN1 Bit[7]: BT_SCB Bit[8]: BT_WAKE_HOST