Audio IC Feature

Basic Modules

A complete audio chain usually consists of the following basic functional modules:

  • Signal Source: Input and output of digital audio data.

    • Interfaces like I2S, PDM, TDM can input digital signals.

    • DMIC: Converts audio signals directly into digital form.

    • AMIC: Converts audio signals into corresponding voltage signals for subsequent audio processing.

  • Destination: Input and output of digital audio data.

    • Interfaces like I2S, PDM, TDM can output digital signals.

    • HPO: Specifically designed for headphones, it is suitable for directly driving headphones, providing a high-quality listening experience.

    • LINEOUT: Used for transmitting unamplified analog audio signals, preserving the quality of the original audio source.

  • Converter:

    • ADC: Converts analog microphone signals to digital signals. Key indicators: Signal-to-Noise Ratio (SNR), Sample Rate.

    • DAC: Converts processed digital audio signals to analog signals. Key indicators for DAC: SNR, Total Harmonic Distortion plus Noise (THD+N).

  • Amplifier:

    • MICBST: Amplifies weak microphone signals.

    • HPC/SPK Amp: Drives headphones or speakers.

  • Processor:

    • HPF: Filters out DC offset and low-frequency noise.

    • EQ: Adjusts audio frequency response to shape the tone.

    • VOL: Adjusts signal amplitude.

  • Power and Bias:

    • MICBIAS: Provides working voltage for the analog microphone.

High-Performance Digital Audio Interface

Design Concept: Deliver pure high-fidelity audio playback and recording.

  • High Compatibility: Many audio components, such as DACs, ADCs, and digital signal processors (DSPs), widely support the I2S interface, facilitating system integration. As an industry-standard audio transmission protocol, I2S ensures compatibility and interoperability between different devices.

  • High-Quality Transmission: I2S transmits digital audio signals, making it less susceptible to noise and ensuring signal accuracy and high audio quality.

  • Low Latency: The synchronous transmission mechanism results in minimal audio signal delay, making it suitable for application scenarios that require real-time audio processing, such as live music or game sound effects.

  • Versatility: Supports multiple audio sampling rates, channels, and formats to meet diverse application needs.

I2S

  • 2 I2S, each supporting up to 8 channels

  • Sample rate up to 192KHz @2channel

  • Mode: master or slave mode

High-Fidelity Audio Codec

Design Concept: Provides powerful hardware acceleration and integration for multi-microphone arrays and complex audio processing scenarios. The support for ADC, DAC converters, integration of amplifier functions, and features such as filters (e.g., HPF and EQ) offer significant advantages for versatility.

Audio Playback

Signal Flow:

../../_images/audio_playback_dplus.svg

Audio Playback Path

Audio Playback With Internal Codec

Function Description:

This path is designed for advanced audio applications, integrating features such as filtering and volume control.

Unique Differences:

The path is more complex, with more diverse processing modules, focusing on audio enhancement and system-level integration rather than directly driving audio devices.

Audio Playback With Sport

Function Description:

This path provides a route for audio data transmission from the SOC memory to the I2S interface. See i2s interface.

Audio Record

Signal Flow:

../../_images/audio_record_dplus.svg

Audio Record Path

Internal Codec Record Parameters

  • Sample rates up to 96 kHz

  • HPF

  • EQ

  • Digital volume control

  • Zero-crossing detection

  • DMIC: 2 channel

Audio Record With Internal Codec

Function Description:

Supports direct input from multiple PDM digital microphones, certain ICs support AMIC analog signal input, and volume adjustment is supported.

Unique Differences:

Supports more input sources and integrates advanced preprocessing algorithms.

Audio Record With Sport

Function Description:

This path provides a route for audio data input from the I2S end and transmission to the SOC memory. See i2s interface.