Analog-to-Digital Converter (ADC)

Introduction

This chapter describes the usage of the 12-bit analog-to-digital converter (ADC).

ADC is a successive-approximation register (SAR) ADC and the conversion result of ADC sample is stored in the result register and can be read on demand.

ADC characteristics are as follows:

• Resolution: 12 bit

• ENOB: 10 bit

• Sample Frequency: 31.25 kHz ~ 250 kHz, 166.67 kHz is recommended (default)

• Sample Capacitance: 2.4 pF ~ 2.93 pF

• Reference Voltage: Fixed, cannot be externally supplied

• Internal Impedance: About 500 kΩ

• FIFO size: 64 x 16 bit

• Channel switch list length: 1 ~ 16

• Description of channels:

RTL8721DxRTL8720ERTL8710ERTL8726ERTL8713ERTL8730ERTL8721F

RTL8721Dx:

Channel	ADC channel ID	Pin name	Input voltage (V)
Normal channel	CH0~CH6	PB13~PB19	0~3.3
BAT_MEAS channel	CH7	BAT_MEAS	0 ~ 5

Note

ADC multi-channel sample is time-division multiplexing on the same circuit. The sample frequency value listed above is specific to a single channel. When multiple channels are set in the channel switch list, the sample frequency will decrease accordingly.

ADC Sample Mode

RTL8721DxRTL8720ERTL8710ERTL8726ERTL8713ERTL8730ERTL8721FRTL8735C

RTL8721Dx:

ADC only supports sample mode: Continuous Mode. In this mode, ADC samples the channels in the channel list continuously and sequentially. Users can start it or stop it at any time. It is suitable for continuous voltage sampling over short periods.

ADC supports multi-channel sample. Users can configure channel switch list, including channel list length and channel switch order.

ADC works as: each time a trigger signal is generated, ADC will sample all the channels in channel switch list in order.

To use ADC continuous mode, the following steps are mandatory.

1. Enable clock and function of ADC module.

   RCC_PeriphClockCmd(APBPeriph_ADC, APBPeriph_ADC_CLOCK, ENABLE);
   RCC_PeriphClockCmd(APBPeriph_CTC, APBPeriph_CTC_CLOCK, ENABLE);
   

2. Configure ADC pinmux according to the pinmux specification.

   For example, call the following functions to use ADC0.

   Pinmux_Config(ADC_CH0_PIN, PINMUX_FUNCTION_xxx); // Refer to pinmux table to get function ID
   PAD_InputCtrl(ADC_CH0_PIN, DISABLE);
   PAD_PullCtrl(ADC_CH0_PIN, GPIO_PuPd_NOPULL);
   PAD_SleepPullCtrl(ADC_CH0_PIN, GPIO_PuPd_NOPULL);
   

   Note

   Step2 could be skipped when user wants to use BAT_MEAS pin.

3. Initialize ADC parameters and modify ADC mode. ADC samples all the channels sequentially by default.

   ADC_StructInit(ADC_InitTypeDef *ADC_InitStruct);
   ADC_InitStruct->ADC_OpMode = ADC_AUTO_MODE; // Set auto mode
   

4. Channel list and other parameters can be modified in ADC_InitStruct if needed.

   For example, user sets channel switch list length to 3 and makes ADC sample ADC0/ADC2/ADC4 in order.

   ADC_InitStruct->ADC_CvlistLen = 3 - 1; // Set channel switch list length
   ADC_InitStruct->ADC_Cvlist[0] = ADC_CH0; // Set the 1st channel ID
   ADC_InitStruct->ADC_Cvlist[1] = ADC_CH2; // Set the 2nd channel ID
   ADC_InitStruct->ADC_Cvlist[2] = ADC_CH4; // Set the 3rd channel ID
   

5. Initialize ADC and enable ADC.

   ADC_Init(ADC_InitTypeDef *ADC_InitStruct);
   ADC_Cmd(ENABLE);
   

6. Read ADC sample data. Users can acquire ADC sample data in polling mode or interrupt mode.

   • Polling mode:

     ADC_ReceiveBuf(u16 *pBuf, u32 len);
     

   • Interrupt mode:

     ADC_INTConfig(ADC_BIT_IT_FIFO_OVER_EN | ADC_BIT_IT_FIFO_FULL_EN, ENABLE);
     InterruptRegister((IRQ_FUN)ADCIrqHandle, ADC_IRQ, NULL, INT_PRI_MIDDLE);
     InterruptEn(ADC_IRQ, INT_PRI_MIDDLE);
     ADC_AutoCSwCmd(ENABLE);
     

   Where ADCIrqHandle is defined as

   u32 ADCIrqHandle(void *para)
   {
      (void)para;
      u32 status = ADC_GetISR();
   
      if (status & ADC_BIT_IT_FIFO_FULL_STS) {
         while (ADC_Readable()) {
            u32 sample_value = ADC_Read(); // Read out sample value
            if (sample_cnt ++ > MAX_SAMPLE_CNT) { // Get enough sample value
               ADC_AutoCSwCmd(DISABLE);
               ADC_INTConfig(ADC_BIT_IT_FIFO_OVER_EN | ADC_BIT_IT_FIFO_FULL_EN, DISABLE);
               InterruptDis(ADC_IRQ);
               break;
            }
         }
      }
   
      ADC_INTClearPendingBits(status);
      return 0;
   }
   

Note

ADC sample result consists of 4-bit Channel ID and 12-bit sample data. User could get them by the following macros:

• ADC_GET_CH_NUM_GLOBAL(sample_data): Get 4-bit channel ID

• ADC_GET_DATA_GLOBAL(sample_data): Get 12-bit sample value

ADC Calibration

ADC Voltage Calibration

• To improve the linearity of ADC input/output characteristics, each chip undergoes nonlinear calibration in factory to reduce ADC gain errors and offset errors.

• Users can directly retrieve voltages via the following APIs:

  • ADC_GetVoltage(u32 chan_data): Get calibrated normal channel voltage.

  • ADC_GetVBATVoltage(u32 vbat_data): Get calibrated BAT_MEAS channel voltage.

ADC Internal Resistor Calibration

• ADC internal resistor R varies among chips.

• Users can directly retrieve internal resistor value via ADC_GetInterR()

ADC Digital Comparator

The ADC includes a digital comparator that generates an interrupt when the sampled value of a specified channel falls within a configured range. Users can perform specific operations (e.g., reading the current voltage) in the interrupt handler.

Digital comparator can work well under all the ADC sample modes.

Digital comparator supports the following comparison modes:

• Below Low Threshold

• Above High Threshold

• Within Range: Greater than or equal to low threshold AND less than or equal to high threshold

• Outside Range: Less than low threshold OR greater than high threshold

Note

Low threshold and high threshold values must be in the range 0 to 4095. Low threshold should not be greater than high threshold.

For example, if user wants to use ADC digital comparator under continuous sample mode, the following steps are mandatory.

1. Enable clock and function of ADC module.

   RCC_PeriphClockCmd(APBPeriph_ADC, APBPeriph_ADC_CLOCK, ENABLE);
   RCC_PeriphClockCmd(APBPeriph_CTC, APBPeriph_CTC_CLOCK, ENABLE);
   

2. Configure ADC pinmux according to the pinmux specification.

   For example, call the following functions to use ADC0.

   Pinmux_Config(ADC_CH0_PIN, PINMUX_FUNCTION_xxx); // Refer to pinmux table to get function ID
   PAD_InputCtrl(ADC_CH0_PIN, DISABLE);
   PAD_PullCtrl(ADC_CH0_PIN, GPIO_PuPd_NOPULL);
   PAD_SleepPullCtrl(ADC_CH0_PIN, GPIO_PuPd_NOPULL);
   

3. Assign a channel and configure the low/high thresholds and comparison mode of digital comparator.

   For example, call the function below to set comparison mode of ADC0. An interrupt will arise when the sampled value is between 2000 and 3000.

   ADC_SetComp(ADC_CH0, 3000, 2000, ADC_COMP_WITHIN_THL_AND_THH);
   InterruptRegister((IRQ_FUN)ADCIrqHandle, ADC_IRQ, NULL, INT_PRI_MIDDLE);
   InterruptEn(ADC_IRQ, INT_PRI_MIDDLE);
   

   Where ADCIrqHandle is defined as

   u32 ADCIrqHandle(void *para)
   {
      (void)para;
      u32 status = ADC_GetISR();
      u32 value;
   
      if (status & ADC_BIT_IT_COMP_ALL_STS) {
         printf("ISR:0x%x, Comp status:0x%x\n", status, ADC->ADC_COMP_STS); // ADC sample data is in predefined range
         while (ADC_Readable() == 0);
         value = ADC_Read();
      }
      ADC_INTClearPendingBits(status);
      return 0;
   }
   

4. Initialize ADC parameters and modify ADC mode. ADC samples all the channels sequentially by default.

   ADC_StructInit(ADC_InitTypeDef *ADC_InitStruct);
   ADC_InitStruct->ADC_OpMode = ADC_AUTO_MODE; // Set auto mode
   

5. Channel list and other parameters can be modified in ADC_InitStruct if needed.

   For example, user sets channel switch list length to 3 and makes ADC sample ADC0/ADC2/ADC4 in order.

   ADC_InitStruct->ADC_CvlistLen = 3 - 1; // Set channel switch list length
   ADC_InitStruct->ADC_Cvlist[0] = ADC_CH0; // Set the 1st channel ID
   ADC_InitStruct->ADC_Cvlist[1] = ADC_CH2; // Set the 2nd channel ID
   ADC_InitStruct->ADC_Cvlist[2] = ADC_CH4; // Set the 3rd channel ID
   

6. Initialize ADC and enable ADC.

   ADC_Init(ADC_InitTypeDef *ADC_InitStruct);
   ADC_Cmd(ENABLE);
   

7. It is suggested to read ADC sample result by polling mode.

ADC Troubleshooting

Sample Offset

Phenomenon	Sample offset
Cause	Calibration parameters are not applicable. Mismatched input impedance.
Solution	Calibrate again. Adjust the input impedance, making sure internal resistance of the signal source is much lower than that of ADC.

Note

• Calibrate the whole application circuit together if possible.

• Refer to the hardware design specification to obtain ADC internal impedance.

Channel Interference

Phenomenon	Channel interference
Cause	Mismatched input impedance leads to poor driving capability of input source. Too high sample frequency.
Solution	Reduce the internal resistance of the signal source. Reduce sample frequency.

Sampling Voltage Interference

Phenomenon	Sampling voltage interference, Low SNR
Cause	Unreasonable PCB layout
Solution	Check PCB layout, such as location of power supplies and high-speed signals, etc. Taking mean value of multi-point samples is suggested.

Raw API

ADC Exported Types

struct ADC_CalParaTypeDef

ADC Calibration Parameter Structure Definition.

Public Members

s32 cal_a

Calibration coefficient A.

s32 cal_b

Calibration coefficient B.

s32 cal_c

Calibration coefficient C.

u8 init_done

Calibration parameter initialization done flag.

RTL8721DxRTL8720ERTL8710ERTL8726ERTL8713ERTL8730ERTL8721FRTL8720F

RTL8721Dx:

struct ADC_InitTypeDef

ADC Init Structure Definition.

Public Members

u8 ADC_OpMode

Specifies ADC operation mode. This parameter can be a value of ADC Operation Mode

u8 ADC_CvlistLen

The number of valid items in the ADC conversion channel list is (ADC_CvlistLen + 1). This parameter can be set to 0~15

u8 ADC_Cvlist[16]

Specifies the ADC channel conversion order. Each member should be a value of ADC Channel Selection

u8 ADC_ClkDiv

Specifies ADC clock divider. This parameter can be a value of ADC Clock Divider

u8 ADC_RxThresholdLevel

Specifies the receive FIFO threshold level. When the number of rx FIFO entries is greater than or equal to this value +1, the receive FIFO full interrupt is triggered.

u8 ADC_SpecialCh

Specifies ADC particular channel. This parameter defines that ADC module should send interrupt signal to system when a conversion which of channel number is the same as this parameter. Default 0xFF means there is no need to set particular channel.

u32 ADC_ChanInType

Specifies CH0~5 input type. Default all channels are in single-end mode. If some channels need to be set to differential mode, use a value or combination of ADC Channel Input Type.

enum ADC_OS_Mode

ADC Oversample Mode.

Values:

/* All oversampling conversions done in staggered sequence */
ADC_OS_STAGGERED = 0x00

/* All oversampling conversions done in regular sequence */
ADC_OS_REGULAR = 0x01

enum ADC_OS_Ratio

ADC Oversample Ratio.

Values:

/* 2x */
ADC_OSR_2 = 0x00

/* 4x */
ADC_OSR_4 = 0x01

/* 8x */
ADC_OSR_8 = 0x02

/* 16x */
ADC_OSR_16 = 0x03

/* 32x */
ADC_OSR_32 = 0x04

/* 64x */
ADC_OSR_64 = 0x05

/* 128x */
ADC_OSR_128 = 0x06

/* 256x */
ADC_OSR_256 = 0x07

enum ADC_OS_Shift

ADC Oversample Right Shift.

Values:

/* No shift */
ADC_OSF_NONE = 0x00

/* Right shift 1 bit */
ADC_OSF_1 = 0x01

/* Right shift 2 bits */
ADC_OSF_2 = 0x02

/* Right shift 3 bits */
ADC_OSF_3 = 0x03

/* Right shift 4 bits */
ADC_OSF_4 = 0x04

/* Right shift 5 bits */
ADC_OSF_5 = 0x05

/* Right shift 6 bits */
ADC_OSF_6 = 0x06

/* Right shift 7 bits */
ADC_OSF_7 = 0x07

ADC Exported Constants

ADC Channel Switch List

/* Bit shift for channel switch list 0 entry x. */
#define ADC_SHIFT_CHSW0 (4*(x))

/* Bit shift for channel switch list 1 entry x. */
#define ADC_SHIFT_CHSW1 (4*((x) - 8))

ADC Channel Input Type

/* Set channel x to differential input mode. */
#define ADC_DIFFERENTIAL_CH ((u32)0x00000001 << (x))

ADC Channel Selection

/* ADC channel 0 index. */
#define ADC_CH0 ((u8)0x00)

/* ADC channel 1 index. */
#define ADC_CH1 ((u8)0x01)

/* ADC channel 2 index. */
#define ADC_CH2 ((u8)0x02)

/* ADC channel 3 index. */
#define ADC_CH3 ((u8)0x03)

/* ADC channel 4 index. */
#define ADC_CH4 ((u8)0x04)

/* ADC channel 5 index. */
#define ADC_CH5 ((u8)0x05)

/* ADC channel 6 index. */
#define ADC_CH6 ((u8)0x06)

/* ADC channel 7 index. */
#define ADC_CH7 ((u8)0x07)

/* ADC channel 8 index. */
#define ADC_CH8 ((u8)0x08)

/* ADC channel 9 index. */
#define ADC_CH9 ((u8)0x09)

/* Global ADC channel identifier. */
#define ADC_GLOBAL ((u8)0xFF)

RTL8721DxRTL8720ERTL8710ERTL8726ERTL8713ERTL8730ERTL8721FRTL8720F

RTL8721Dx:

/* ADC channel 10 index (internal). */
#define ADC_CH10 ((u8)0x0A)

/* ADC dummy cycle channel. */
#define ADC_DUMMY_CYCLE ((u8)0x0F)

/* Total number of ADC channels. */
#define ADC_CH_NUM (11)

/* Number of external ADC channels. */
#define ADC_EXT_CH_NUM (7)

/* Check if ADC channel selection is valid. */
#define IS_ADC_CHN_SEL (((SEL) == ADC_CH0) || \
    ((SEL) == ADC_CH1) || \
    ((SEL) == ADC_CH2) || \
    ((SEL) == ADC_CH3) || \
    ((SEL) == ADC_CH4) || \
    ((SEL) == ADC_CH5) || \
    ((SEL) == ADC_CH6) || \
    ((SEL) == ADC_CH7) || \
    ((SEL) == ADC_CH8) || \
    ((SEL) == ADC_CH9) || \
    ((SEL) == ADC_CH10) || \
    ((SEL) == ADC_DUMMY_CYCLE))

ADC Compare Control

/* Compare criterion: Vin below lower threshold. */
#define ADC_COMP_SMALLER_THAN_THL ((u8)0x00)

/* Compare criterion: Vin above upper threshold. */
#define ADC_COMP_GREATER_THAN_THH ((u8)0x01)

/* Compare criterion: Vin within lower and upper thresholds. */
#define ADC_COMP_WITHIN_THL_AND_THH ((u8)0x02)

/* Compare criterion: Vin outside lower and upper thresholds. */
#define ADC_COMP_OUTSIDE_THL_AND_THH ((u8)0x03)

/* Check if ADC comparison criteria is valid. */
#define IS_ADC_COMP_CRITERIA (((rule) == ADC_COMP_SMALLER_THAN_THL) || \
    ((rule) == ADC_COMP_GREATER_THAN_THH) || \
    ((rule) == ADC_COMP_WITHIN_THL_AND_THH) || \
    ((rule) == ADC_COMP_OUTSIDE_THL_AND_THH))

ADC Comparison Setting

/* Bit shift for comparison control of channel x. */
#define ADC_SHIFT_COMP_CTRL_CH (2*x)

/* Bitmask for comparison control of channel x. */
#define ADC_MASK_COMP_CTRL_CH (u32)(0x00000003 << ADC_SHIFT_COMP_CTRL_CH(x))

/* Bit shift for comparison status of channel x. */
#define ADC_SHIFT_COMP_STS_CH (2*x)

/* Bitmask for comparison status of channel x. */
#define ADC_MASK_COMP_STS_CH (u32)(0x00000003 << ADC_SHIFT_COMP_STS_CH(x))

/* Comparison interrupt enable bit for channel x. */
#define ADC_IT_COMP_CH_EN ((u32)0x00000001 << ((8+x)))

RTL8721DxRTL8720ERTL8710ERTL8726ERTL8713ERTL8730ERTL8721FRTL8720F

RTL8721Dx:

/* Comparison interrupt detection mode: level. */
#define ADC_COMP_LEVEL_DETECT (0x0)

/* Comparison interrupt detection mode: edge. */
#define ADC_COMP_EDGE_DETECT (0x1)

ADC Operation Mode

/* ADC software-trigger operation mode. */
#define ADC_SW_TRI_MODE ((u8)0x00)

/* ADC automatic operation mode. */
#define ADC_AUTO_MODE ((u8)0x01)

/* ADC timer-trigger operation mode. */
#define ADC_TIM_TRI_MODE ((u8)0x02)

RTL8721DxRTL8720ERTL8710ERTL8726ERTL8713ERTL8730ERTL8721FRTL8720F

RTL8721Dx:

/* ADC comparator-assist operation mode. */
#define ADC_COMP_ASSIST_MODE ((u8)0x03)

/* Check if ADC operation mode is valid. */
#define IS_ADC_MODE (((mode) == ADC_SW_TRI_MODE) || \
    ((mode) == ADC_AUTO_MODE) || \
    ((mode) == ADC_TIM_TRI_MODE) || \
    ((mode) == ADC_COMP_ASSIST_MODE))

ADC Valid Timer

/* Check if ADC timer index value is valid. */
#define IS_ADC_VALID_TIM ((idx) < 8)

ADC Channel Pad Selection

RTL8721DxRTL8720ERTL8710ERTL8726ERTL8713ERTL8730ERTL8721FRTL8720F

RTL8721Dx:

/* Pin mapping for ADC channel 0. */
#define ADC_CH0_PIN (_PB_19)

/* Pin mapping for ADC channel 1. */
#define ADC_CH1_PIN (_PB_18)

/* Pin mapping for ADC channel 2. */
#define ADC_CH2_PIN (_PB_17)

/* Pin mapping for ADC channel 3. */
#define ADC_CH3_PIN (_PB_16)

/* Pin mapping for ADC channel 4. */
#define ADC_CH4_PIN (_PB_15)

/* Pin mapping for ADC channel 5. */
#define ADC_CH5_PIN (_PB_14)

/* Pin mapping for ADC channel 6. */
#define ADC_CH6_PIN (_PB_13)

ADC Clock Divider

RTL8721DxRTL8720ERTL8710ERTL8726ERTL8713ERTL8730ERTL8721FRTL8720F

RTL8721Dx:

/* ADC clock divided by 4. */
#define ADC_CLK_DIV_4 ((u8)0x00)

/* ADC clock divided by 8. */
#define ADC_CLK_DIV_8 ((u8)0x01)

/* ADC clock divided by 16. */
#define ADC_CLK_DIV_16 ((u8)0x02)

/* ADC clock divided by 24. */
#define ADC_CLK_DIV_24 ((u8)0x03)

/* ADC clock divided by 32. */
#define ADC_CLK_DIV_32 ((u8)0x04)

/* ADC clock divided by 64. */
#define ADC_CLK_DIV_64 ((u8)0x05)

/* ADC clock divided by 128. */
#define ADC_CLK_DIV_128 ((u8)0x06)

/* Check if ADC sample clock divider is valid. */
#define IS_ADC_SAMPLE_CLK ((CLK) == ADC_CLK_DIV_4) || \
    ((CLK) == ADC_CLK_DIV_8) || \
    ((CLK) == ADC_CLK_DIV_16) || \
    ((CLK) == ADC_CLK_DIV_24) || \
    ((CLK) == ADC_CLK_DIV_32) || \
    ((CLK) == ADC_CLK_DIV_64) || \
    ((CLK) == ADC_CLK_DIV_128)

ADC Compare Threshold

RTL8721DxRTL8720ERTL8710ERTL8726ERTL8713ERTL8730ERTL8721FRTL8720F

RTL8721Dx:

/* Check if ADC comparison threshold value is valid. */
#define IS_ADC_VALID_COMP_TH ((x) < 0x10000)

ADC Interrupt Control

RTL8721DxRTL8720ERTL8710ERTL8726ERTL8713ERTL8730ERTL8721FRTL8720F

RTL8721Dx:

/* Bitmask enabling all ADC interrupts. */
#define ADC_BIT_IT_ALL_EN (ADC_BIT_IT_COMP_CH10_EN  |\
    ADC_BIT_IT_COMP_CH9_EN   |\
    ADC_BIT_IT_COMP_CH8_EN   |\
    ADC_BIT_IT_COMP_CH7_EN   |\
    ADC_BIT_IT_COMP_CH6_EN   |\
    ADC_BIT_IT_COMP_CH5_EN   |\
    ADC_BIT_IT_COMP_CH4_EN   |\
    ADC_BIT_IT_COMP_CH3_EN   |\
    ADC_BIT_IT_COMP_CH2_EN   |\
    ADC_BIT_IT_COMP_CH1_EN   |\
    ADC_BIT_IT_COMP_CH0_EN   |\
    ADC_BIT_IT_ERR_EN        |\
    ADC_BIT_IT_DAT_OVW_EN    |\
    ADC_BIT_IT_FIFO_EMPTY_EN |\
    ADC_BIT_IT_FIFO_OVER_EN  |\
    ADC_BIT_IT_FIFO_FULL_EN  |\
    ADC_BIT_IT_CHCV_END_EN   |\
    ADC_BIT_IT_CV_END_EN     |\
    ADC_BIT_IT_CVLIST_END_EN)

ADC Interrupt Status

RTL8721DxRTL8720ERTL8710ERTL8726ERTL8713ERTL8730ERTL8721FRTL8720F

RTL8721Dx:

/* Bitmask of all channel comparison interrupt status bits. */
#define ADC_BIT_IT_COMP_ALL_STS (ADC_BIT_IT_COMP_CH0_STS | \
    ADC_BIT_IT_COMP_CH1_STS | \
    ADC_BIT_IT_COMP_CH2_STS | \
    ADC_BIT_IT_COMP_CH3_STS | \
    ADC_BIT_IT_COMP_CH4_STS | \
    ADC_BIT_IT_COMP_CH5_STS | \
    ADC_BIT_IT_COMP_CH6_STS | \
    ADC_BIT_IT_COMP_CH7_STS | \
    ADC_BIT_IT_COMP_CH8_STS | \
    ADC_BIT_IT_COMP_CH9_STS | \
    ADC_BIT_IT_COMP_CH10_STS)

/* Bitmask of all ADC interrupt status bits. */
#define ADC_BIT_IT_ALL_STS (ADC_BIT_IT_COMP_ALL_STS | \
    ADC_BIT_IT_ERR_STS | \
    ADC_BIT_IT_DAT_OVW_STS |\
    ADC_BIT_IT_FIFO_EMPTY_STS |\
    ADC_BIT_IT_FIFO_OVER_STS |\
    ADC_BIT_IT_FIFO_FULL_STS |\
    ADC_BIT_IT_CHCV_END_STS |\
    ADC_BIT_IT_CV_END_STS |\
    ADC_BIT_IT_CVLIST_END_STS)

ADC Data Setting

RTL8721DxRTL8720ERTL8710ERTL8726ERTL8713ERTL8730ERTL8721FRTL8720F

RTL8721Dx:

/* Extract channel ID and conversion data from ADC register value. */
#define ADC_ID_AND_DATA ((u32)((x) & 0x000FFFFF))

ADC OTP Address Setting

RTL8721DxRTL8720ERTL8710ERTL8726ERTL8713ERTL8730ERTL8721FRTL8720F

RTL8721Dx:

/* OTP address for normal channel voltage calibration. */
#define NORM_VOL_ADDR 0x704

/* OTP address for VBAT channel voltage calibration. */
#define VBAT_VOL_ADDR 0x70A

/* OTP address for voltage reference selection. */
#define VREF_SEL_ADDR 0x7EB

/* OTP address for internal resistance calibration. */
#define INTER_R_ADDR 0x7EC

ADC Vref Selection

RTL8721DxRTL8720ERTL8710ERTL8726ERTL8713ERTL8730ERTL8721FRTL8720F

RTL8721Dx:

Not supported.

ADC Exported Functions

void ADC_AutoCSwCmd(u32 NewState)

Enable or disable the automatic channel switch.

Parameters:

• NewState –

  This parameter can be one of the following values:

  • ENABLE: Enable the automatic channel switch.

  • DISABLE: Disable the automatic channel switch.

Note

• Used in Automatic Mode.

• When setting this bit, an automatic channel switch starts from the first channel in the channel switch list.

• If an automatic channel switch is in progress, writing 0 will terminate the automatic channel switch.

void ADC_ClearFIFO(void)

Clear ADC FIFO.

void ADC_Cmd(u32 NewState)

Enable or disable the ADC peripheral.

Parameters:

• NewState – New state of the ADC peripheral. This parameter can be ENABLE or DISABLE.

u32 ADC_GetCompStatus(u8 ADC_Channel)

Get comparison result of ADC channel.

Parameters:

• ADC_Channel – ADC channel index.

Returns:

The comparison result of specified ADC channel.

u32 ADC_GetISR(void)

Get ADC interrupt status.

Returns:

Current interrupt status.

u32 ADC_GetInterR(void)

Get internal R resistance of V33 channels(CH0~CH5) in divided mode.

Returns:

Internal R resistance value in Kohm.

u32 ADC_GetLastChan(void)

Get the last ADC used channel.

Returns:

The last ADC used channel index.

u32 ADC_GetRawISR(void)

Get ADC raw interrupt status.

Returns:

Current raw interrupt status.

u32 ADC_GetRxCount(void)

Get the number of valid entries in ADC receive FIFO.

Returns:

The number of valid entries in receive FIFO.

u32 ADC_GetStatus(void)

Get ADC status.

Returns:

Current status.

s32 ADC_GetVoltage(u32 chan_data)

Get normal channel voltage value in mV.

Parameters:

• chan_data – ADC conversion data.

Returns:

ADC voltage value in mV.

void ADC_INTClear(void)

Clear all the ADC interrupt pending bits.

Note

This function can also be used to clear raw interrupt status.

void ADC_INTClearPendingBits(u32 ADC_IT)

Clear specified ADC interrupt pending bits.

Parameters:

• ADC_IT – Pending bits to be cleared. This parameter is a bitmask of the ADC_INTR_STS register bits.

void ADC_INTConfig(u32 ADC_IT, u32 NewState)

Enable or disable ADC interrupt(s).

Parameters:

• ADC_IT – ADC interrupt(s) to be enabled or disabled. This parameter is a bitmask of the ADC_INTR_CTRL register bits.

• NewState – ENABLE or DISABLE.

void ADC_Init(ADC_InitTypeDef *ADC_InitStruct)

Initialize ADC according to the specified parameters in ADC_InitStruct.

Parameters:

• ADC_InitStruct – Pointer to an ADC_InitTypeDef structure that contains the configuration information of the ADC peripheral.

u32 ADC_Read(void)

Read data from ADC receive FIFO .

Returns:

The conversion data with the channel index that the data belongs to.

u32 ADC_Readable(void)

Determine ADC FIFO is readable or not.

Returns:

ADC FIFO is readable or not:

• 0: Not readable

• 1: Readable

void ADC_ReceiveBuf(u32 *pBuf, u32 len)

Read data in auto mode continuously.

Parameters:

• pBuf – Pointer to buffer to keep sample data.

• len – Number of sample data to be read.

void ADC_SetComp(u8 ADC_channel, u16 CompThresH, u16 CompThresL, u8 CompCtrl)

Set ADC channel threshold and criteria for comparison.

Parameters:

• ADC_channel – This parameter can be a value of ADC Channel Selection.

• CompThresH – Higher threshold of channel for ADC automatic comparison.

• CompThresL – Lower threshold of channel for ADC automatic comparison.

• CompCtrl –

  This parameter can be a value of ADC Compare Control as following:

  • ADC_COMP_SMALLER_THAN_THL: less than the lower threshold

  • ADC_COMP_GREATER_THAN_THH: greater than the higher threshold

  • ADC_COMP_WITHIN_THL_AND_THH: between the lower and higher threshold

  • ADC_COMP_OUTSIDE_THL_AND_THH: out the range of the higher and lower threshold

void ADC_StructInit(ADC_InitTypeDef *ADC_InitStruct)

Initialize the parameters in the ADC_InitStruct with default values.

Parameters:

• ADC_InitStruct – Pointer to an ADC_InitTypeDef structure that contains the configuration information of the ADC peripheral.

RTL8721DxRTL8720ERTL8710ERTL8726ERTL8713ERTL8730ERTL8721FRTL8720F

RTL8721Dx:

u32 ADC_GetSampleValue(s32 VolMV, u8 IsVBatChan)

Get normal or vbat sample value according to voltage in mV.

Parameters:

• VolMV – ADC Voltage in mV.

• IsVBatChan –

  Calibration parameter belongs to vbat channel or normal channel. This parameter can be one of the following values:

  • TRUE: Calibration parameter belongs to vbat channel.

  • FALSE: Calibration parameter belongs to normal channel.

Returns:

ADC conversion data.

void ADC_InitCalPara(ADC_CalParaTypeDef *CalPara, u8 IsVBatChan)

Initialize ADC calibration parameters according to EFuse.

Parameters:

• CalPara – Pointer to ADC calibration parameter structure.

• IsVBatChan –

  Calibration parameter belongs to vbat channel or normal channel. This parameter can be one of the following values:

  • TRUE: Calibration parameter belongs to vbat channel.

  • FALSE: Calibration parameter belongs to normal channel.

s32 ADC_GetVBATVoltage(u32 vbat_data)

Get VBAT voltage value in mV.

Parameters:

• vbat_data – ADC conversion data from VBAT channel.

Returns:

ADC voltage value in mV.

Note

This function is only for VBAT channel.

void ADC_OverSampleCmd(u32 NewState)

Control ADC oversample function.

Parameters:

• NewState –

  This parameter can be one of the following values:

  • ENABLE: Enable ADC oversample.

  • DISABLE: Disable ADC oversample.

void ADC_SetChList(u8 *ChanIdBuf, u8 ChanLen)

Set list length and channel ID of ADC channel switch list.

Parameters:

• ChanIdBuf – Pointer to ADC channel ID buffer, which contains value of ADC Channel Selection.

• ChanLen – ADC channel list length, which can be 1 ~ 16.

void ADC_SetCompMode(u8 det_mode)

Set ADC comparison detection mode.

Parameters:

• det_mode –

  This parameter can be one of the following values:

  • ADC_COMP_LEVEL_DETECT: Level detection mode.

  • ADC_COMP_EDGE_DETECT: Edge detection mode.

void ADC_SetOverSample(ADC_OS_Shift OS_Shift, ADC_OS_Ratio OS_Ratio, ADC_OS_Mode OS_Mode)

Set ADC oversample parameters.

Parameters:

• OS_Shift – Oversample right shift bit. This parameter can be a value of ADC_OS_Shift.

• OS_Ratio – Oversample ratio. This parameter can be a value of ADC_OS_Ratio.

• OS_Mode – Oversample mode. This parameter can be a value of ADC_OS_Mode.

Mbed API

MBED_ADC Exported Types

Enumeration Type

enum AnalogInCallback

Analog input (ADC) callback event types.

Values:

/* DMA RX transfer complete event. */
ANALOGIN_RX_DMA_COMPLETE = 0

MBED_ADC Exported Functions

void analogin_deinit(analogin_t *obj)

Deinitialize the ADC device, including clock, function and ADC registers.

Parameters:

• obj – ADC object defined in application software.

void analogin_init(analogin_t *obj, PinName pin)

Initialize the ADC device, including clock, function and ADC registers.

Parameters:

• obj – ADC object defined in application software.

• pin – ADC PinName according to pinmux spec.

float analogin_read(analogin_t *obj)

Read data from the specified ADC channel FIFO.

Parameters:

• obj – ADC object defined in application software.

Returns:

ADC channel data(float).

uint16_t analogin_read_u16(analogin_t *obj)

Read data from the specified ADC channel FIFO.

Parameters:

• obj – ADC object defined in application software.

Returns:

16b ADC channel data(int).

uint32_t analogin_voltage_norm(uint32_t adc_data)

Get channel voltage in mV according to conversion data from normal channel.

Parameters:

• adc_data – ADC conversion data from normal channel.

Returns:

Normal channel voltage in mV.

RTL8721DxRTL8720ERTL8710ERTL8726ERTL8713ERTL8730ERTL8721FRTL8720F

RTL8721Dx:

uint32_t analogin_voltage_vbat(uint32_t adc_data)

Get channel voltage in mV according to conversion data from VBAT channel.

Parameters:

• adc_data – ADC conversion data from VBAT channel.

Returns:

VBAT channel voltage in mV.