PINMUX & PAD

Pin Multiplexing

Overview

Due to limited pin resources, the chip provides pin multiplexing (PINMUX) functionality to enhance design flexibility. Each pin can be configured to connect to different internal IP circuits. For the specific mapping between pins and IP circuits, please refer to Pinmux Table.

The pin multiplexing table provides the following key information:

  • Pin distribution under different Part numbers

  • On-chip peripheral signals supported by each pin

  • Distribution of power-up latch pins (Trap Pin)

  • Default pin allocation for J-Link Debug Interface (SWD)

  • Default pin allocation for firmware download, command interaction, and log functions via serial port (LOGUART)

  • Power supply information for each I/O pin, etc.

Function Multiplexing

RTL8721Dx:

Usage Method

Developers can connect pins to specified on-chip peripheral signals by calling the programming interface Pinmux_Config(PinName, PinFuncID).

Parameter description:

PinName:

Pin identifier

PinFuncID:

Specified signal ID of the on-chip peripheral controller

Based on the configured function-id, pins can either output internal chip signals to external devices or receive signals input from external devices to internal chip modules.

For specific pin to function-id mappings, refer to Pinmux Table.

Function ID

  • Function ID 0~{{IC_PARAM_FUNCID_DEDICATE_END}}

    When Function ID is 0~{{IC_PARAM_FUNCID_DEDICATE_END}}, each pin can only connect to fixed signals of specific IPs. These pins have limited configurable functions, but dedicated designs can maximize the performance of each IP module.

    Note

    For example, both Function ID {{IC_PARAM_FUNCID_DEDICATE_END}} and Function IDs {{IC_PARAM_FUNCID_FULL_MATRIX_SPI1_CLK}}~{{IC_PARAM_FUNCID_FULL_MATRIX_SPI1_CS}} represent SPI functions.

    • Function ID {{IC_PARAM_FUNCID_DEDICATE_END}} uses dedicated pins, enabling SPI function to achieve maximum rate of 50MHz (master mode).

    • Function ID {{IC_PARAM_FUNCID_FULL_MATRIX_SPI1_CLK}}~{{IC_PARAM_FUNCID_FULL_MATRIX_SPI1_CS}} (full-cross pins) can only achieve maximum rate of 12.5MHz (master mode).

    Take PB30 as an example: When configured with Function ID 1, this pin will be directly connected to the UART1_RXD signal of UART1 through pin multiplexing.

    ../../_images/dplus_schematic_diagram_of_pinmux_dedicate_of_PB30.svg

    PB30 pin multiplexing connection diagram

    Refer to the Pinmux Table for specific function assignments supported by each pin.

  • Function ID {{IC_PARAM_FUNCID_FULL_MATRIX_START}}~{{IC_PARAM_FUNCID_FULL_MATRIX_END}}

    When Function ID is {{IC_PARAM_FUNCID_FULL_MATRIX_START}}~{{IC_PARAM_FUNCID_FULL_MATRIX_END}}, each pin can connect to different signals of specific IPs. This design provides greater configuration flexibility, but with limitations in application scope and performance (e.g., maximum transmission rate) of some IP modules.

    Take PA27 as an example:

    • When configuring Function ID of PA27 as 19, it connects to UART0_TXD signal of UART0;

    • When configuring Function ID of PA27 as 20, it connects to UART0_RXD signal of UART0.

    ../../_images/dplus_schematic_diagram_of_pinmux_fullmatrix_of_PA27.svg

    PA27 pin multiplexing connection diagram

    Refer to the Pinmux Table for specific configurations.

Trap Pins

Caution

Before development, please pay attention to the following pin multiplexing related matters to avoid usage issues due to accidental behavior.

During chip power-up, certain pins are latched by internal circuits to determine whether to enter different modes.

The table below lists all Trap pins and their descriptions.

RTL8721Dx:

Pin name

Symbol

Active level

Description

PB31

TM_DIS

Low

  • Disables test mode

    • By default internal pull-up

  • This pin is for internal testing only

    • Keep logic high during normal mode

    • 1: Normal operation mode

    • 0: Test mode

PB5

UD_DIS

Low

  • Disables UART download mode

    • By default internal pull-up

  • Download disable is also controlled by OTP-related field

    If OTP disables download, ignore its power-on latch state

    • 1: Enter normal boot mode

    • 0: Enter UART download mode

Note

  • Trap pins require external pull-up or pull-down voltage according to the I/O power supply selection.

Wake Pins

RTL8721Dx:

  • General GPIO pins support waking the system from CG and PG sleep modes.

  • Wake-up pins (PB30 and PB31) are directly connected to wake-up circuits, and can wake the system from DSLP mode in addition to CG and PG modes.

Warning

  • Disable wake-up functionality before multiplexing these two pins.

  • Wake-up pins may be multiplexed with Trap pins.

    When multiplexing, ensure the Trap pin’s signal level after wake-up does not cause the system to enter unexpected modes.

SWD Pins

RTL8721Dx:

Pins {{IC_PARAM_SWD_CLK_PIN}} and {{IC_PARAM_SWD_DATA_PIN}} are forcibly locked to the SWD function by default.

If you want to multiplex these two pins, you must first disable the SWD function, which is already handled by the programming interface Pinmux_Config().

Note

When the following log message appears, it indicates that {{IC_PARAM_SWD_CLK_PIN}} or {{IC_PARAM_SWD_DATA_PIN}} has been connected to another module, and you can no longer connect the debugger via that pin.

If you still need to connect the debugger, please refer to Function Multiplexing to reconfigure the pins for the SWD signals.

SWD PAD PortX_PinYY is configured to funcIDZZ

Raw API

PINMUX Exported Constants

PINMUX Peripheral Location Definitions
/* Peripheral pinmux location selection 0. */
#define PINMUX_S0 (0)

/* Peripheral pinmux location selection 1. */
#define PINMUX_S1 (1)

/* Peripheral pinmux location selection 2. */
#define PINMUX_S2 (2)

/* Peripheral pinmux location selection 3. */
#define PINMUX_S3 (3)

/* Peripheral pinmux location selection 4. */
#define PINMUX_S4 (4)

/* Peripheral pinmux location selection 5. */
#define PINMUX_S5 (5)
PINMUX Port and Pin Definitions
/* Extract port number from pin name. */
#define PORT_NUM ((pin>>5) & 0x03)

/* Extract pin number from pin name. */
#define PIN_NUM (pin & 0x1f)

PINMUX Exported Functions

void Pinmux_Config(u8 PinName, u32 PinFunc)

Set the function type of one pin.

Parameters:

  • PinName – Target pin. This parameter must be one of the values defined in PINMUX_Pin_Name_definitions.

  • PinFunc – The function type for the pin, value of PINMUX_Function_definitions.

u32 Pinmux_ConfigGet(u8 PinName)

Get the function type of one pin.

Parameters:

  • PinName – Target pin. This parameter must be one of the values defined in PINMUX_Pin_Name_definitions.

Returns:

The function type for the pin, value of PINMUX_Function_definitions.

void Pinmux_Swdoff(void)

Turn off pinmux SWD function.

Note

When multiplexing shared SWD pins to other functions, this function must be called.

Pin Control

Overview

Ameba series I/Os provide flexible connectivity options, supporting interfaces with on-chip analog and digital circuits. For details, see I/O Block Diagram. Methods for configuring PAD connections to on-chip signals can be found in the Pin Multiplexing section. This section mainly introduces the functions and programming methods supported by PAD.

Note

For PAD feature parameters, such as pull-up/down resistor information, drive strength, voltage characteristics, and signal edge rate performance indicators, please refer to the chip datasheet.

../../_images/pad_path.svg

I/O Block Diagram

Features

The pin control module supports flexible I/O electrical characteristics control:

  • Internal Pull-up/Pull-down Resistors

    • Configurable on-chip resistor network supporting pull-up/pull-down/high-impedance control

    • Adjustable resistor values for pull-up/pull-down on certain pins

  • Programmable Driving Strength Levels

    Programmable drive capability with multiple selectable levels

  • Programmable Slew Rate Control

    Adjustable signal edge rate, supporting fast/slow mode switching

LP Mode Pin State Management

In Active and Low power modes, the PAD’s PU/PD functions are controlled by different registers. This design allows for independent configuration of internal pull-up or pull-down resistors for each pin in low power mode.

PAD Input States

  • Normal Sleep Mode (PG or CG)

    The PU/PD functions of all PADs are effective.

  • Deep Sleep Mode

    • The PU/PD functions of most PADs remain effective;

    • The power supply to certain PADs will be turned off, causing the PU/PD on these pins to fail, thus they may float.

      • If circuits connected to these PADs need to be pulled high or low, external resistors must be used on the PCB.

    Note

    For PADs where the PU/PD function is ineffective in deep sleep mode, please refer to the chip datasheet.

PAD Output States

  • Normal Sleep Mode (PG or CG)

    The PAD output states will remain the same as before sleep.

    For example, if an I/O is set to output 1 before sleep, when the system enters PG or CG, this I/O will still maintain output 1.

  • Deep Sleep Mode

    The 1/0 output states set in Active will be invalid.

    For example, if an I/O is set to output 1 before sleep, once the system enters deep sleep, this I/O will not maintain the output 1 state.

Analog-Digital Shared Pin Usage

Some PADs are designed to connect to both analog circuits and digital circuits.

To ensure the completeness of analog signals, these PADs must disconnect from digital paths when used for analog functions (for example, as ADC input).

ADC When used as an analog function, it should be disconnected from the digital path.

ADC

RTL8721Dx:

None.

USB PAD

RTL8721Dx:

  • When configured as a USB PAD, perform the following operations:

    Configure PU/PD to floating state, this operation has been implemented in the underlying driver code, no additional operations are needed.

    For more technical details, please refer to the USB section.

  • When switching from USB function to other functions:

    Simply perform the corresponding USB de-initialization operations and carry out pin multiplexing as needed, no additional operations are required.

Raw API

PAD Exported Constants

PAD Drive Strength Definitions
/* PAD drive strength lowest level. */
#define PAD_DRV_ABILITITY_LOW (0)

/* PAD drive strength mid-low level. */
#define PAD_DRV_ABILITITY_MID_LOW (1)

/* PAD drive strength mid-high level. */
#define PAD_DRV_ABILITITY_MID_HIGH (2)

/* PAD drive strength highest level. */
#define PAD_DRV_ABILITITY_HIGH (3)
PAD Pull Resistor Definitions
/* PAD large pull resistor. */
#define PAD_Resistor_LARGE 0x00

/* PAD small pull resistor. */
#define PAD_Resistor_SMALL 0x01
PAD Slew Rate Definitions
/* PAD output slew rate fast. */
#define PAD_SlewRate_Fast (0)

/* PAD output slew rate slow. */
#define PAD_SlewRate_Slow (1)

PAD Exported Functions

void PAD_CMD(u8 PinName, u8 NewStatus)

Set the Internal pad shutdown or enable mode.

Parameters:

  • PinName – Target pin. This parameter must be one of the values defined in PINMUX_Pin_Name_definitions.

  • NewStatus – Enable or disable (shutdown)

void PAD_DrvStrength(u8 PinName, u32 DrvStrength)

Set the driving strength of the specified PAD.

Parameters:

  • PinName – Target pin. This parameter must be one of the values defined in PINMUX_Pin_Name_definitions.

  • DrvStrength – PAD driving strength. This parameter can be a value of PAD Drive Strength Definitions.

void PAD_InputCtrl(u8 PinName, u32 NewState)

Control digital path input.

Parameters:

  • PinName – Target pin. This parameter must be one of the values defined in PINMUX_Pin_Name_definitions.

  • NewState –

    Digital path input status.

    • ENABLE: Enable digital path input.

    • DISABLE: Disable digital path input.

void PAD_PullCtrl(u8 PinName, u8 PullType)

Set the internal PAD pull type.

Parameters:

  • PinName – Target pin. This parameter must be one of the values defined in PINMUX_Pin_Name_definitions.

  • PullType –

    Pull type for the pin. This parameter can be one of the following values:

    • GPIO_PuPd_NOPULL

    • GPIO_PuPd_DOWN

    • GPIO_PuPd_UP

void PAD_ResistorCtrl(u8 PinName, u8 RType)

Set the internal PAD resistor type.

Parameters:

  • PinName – Target pin. This parameter must be one of the values defined in PINMUX_Pin_Name_definitions.

  • RType –

    Resistor type for the pin. This parameter can be one of the following values:

    • PAD_Resistor_LARGE

    • PAD_Resistor_SMALL

void PAD_SchmitCtrl(u8 PinName, u32 NewState)

Set the PAD Schmitt trigger control status.

Parameters:

  • PinName – Target pin. This parameter must be one of the values defined in PINMUX_Pin_Name_definitions.

  • NewState – Specify the control status. Refer to the datasheet for detail informations. This parameter can be: ENABLE or DISABLE.

void PAD_SleepPullCtrl(u8 PinName, u8 PullType)

Set the internal PAD pull type in sleep and deepsleep mode. The hardware will automatically switch to the sleep pull control when the system enters sleep or deepsleep mode. The hardware will automatically switch to the function pull control when the system wakes up from sleep mode.

Parameters:

  • PinName – Target pin. This parameter must be one of the values defined in PINMUX_Pin_Name_definitions.

  • PullType –

    Pull type for the pin. This parameter can be one of the following values:

    • GPIO_PuPd_NOPULL

    • GPIO_PuPd_DOWN

    • GPIO_PuPd_UP

void PAD_SlewRateCtrl(u8 PinName, u32 NewState)

Set the PAD slew rate control status.

Parameters:

  • PinName – Target pin. This parameter must be one of the values defined in PINMUX_Pin_Name_definitions.

  • NewState –

    Specify the slew rate control status. Refer to the datasheet for detail informations. This parameter can be one of the following values:

    • PAD_SlewRate_Slow

    • PAD_SlewRate_Fast

RTL8721Dx:

Not supported.