Raw API

GDMA Exported Types

struct GDMA_CH_LLI

GDMA CH LLI Structure Definition.

Public Members

GDMA_CH_LLI_ELE LliEle

Specifies the GDMA Linked List Item Element structure field of Linked List Item in block chaining. This structure variable stores the necessary parameters of a block descriptor.

u32 BlockSize

Specifies the GDMA block size of one block in block chaining. This parameter indicates the block size of the current block transfer.

struct GDMA_CH_LLI *pNextLli

Specifies the GDMA Linked List Item pointer. This parameter stores the address pointing to the next Linked List Item in block chaining.

struct GDMA_CH_LLI_ELE

GDMA LLI ELE Structure Definition.

Public Members

u32 Sarx

Specifies the GDMA channel x Source Address Register (SARx) value field of a block descriptor in block chaining. This parameter stores the source address of the current block transfer.

u32 Darx

Specifies the GDMA channel x Destination Address Register(DARx) value field of a block descriptor in block chaining. This parameter stores the destination address of the current block transfer.

u32 Llpx

Specifies the GDMA channel x Linked List Pointer Register(LLPx) value field of a block descriptor in block chaining. This parameter is a address, which points to the next block descriptor.

u32 CtlxLow

Specifies the GDMA channel x Control Register(CTRx) Low 32 bit value field of a block descriptor in block chaining. This parameter stores the DMA control parameters of the current block transfer.

u32 CtlxUp

Specifies the GDMA channel x Control Register(CTRx) High 32 bit value field of a block descriptor in block chaining. This parameter stores the DMA control parameters of the current block transfer.

u32 Temp

Specifies the reserved GDMA channel x register value field of a block descriptor in block chaining.

struct GDMA_InitTypeDef

GDMA Init Structure Definition.

Public Members

u8 GDMA_Index

Specifies the GDMA index. This parameter can be the value 0.

u8 GDMA_ChNum

Specifies the GDMA channel number. This parameter can be the value 0 ~ 7.

u8 GDMA_ChPrior

Specifies the GDMA channel priority. This parameter can be the value 0 ~ 7, while 0 for highest priority. If more than one channel are set with the same priority value, the channel with small channel number index has higher priority.

u32 GDMA_DIR

Specifies the GDMA transmission direction. This parameter can be a value of GDMA Data Transfer Direction.

u32 GDMA_DstDataWidth

Specifies the GDMA destination transfer width. This parameter can be a value of GDMA Data Size.

u32 GDMA_SrcDataWidth

Specifies the GDMA transfer width. This parameter can be a value of GDMA Data Size.

u32 GDMA_DstInc

Specifies the GDMA destination address increment mode. This parameter can be a value of GDMA Increment Mode.

u32 GDMA_SrcInc

Specifies the GDMA source address increment mode. This parameter can be a value of GDMA Increment Mode.

u32 GDMA_DstMsize

Specifies the GDMA destination burst transaction length. This parameter can be a value of GDMA Msize.

u32 GDMA_SrcMsize

Specifies the GDMA source burst transaction length. This parameter can be a value of GDMA Msize.

u32 GDMA_SrcAddr

Specifies the GDMA source address. This parameter can be a value of the memory or peripheral space address, depending on the GDMA data transfer direction.If this address is configured, GDMA will move data from here to the destination address space.

u32 GDMA_DstAddr

Specifies the GDMA destination address. This parameter can be a value of the memory or peripheral space address, depending on the GDMA data transfer direction.If this address is configured, GDMA will move data here from source address space.

u32 GDMA_BlockSize

Specifies the GDMA block transfer size. This parameter indicates the total number of single transactions for every block transfer.

u32 GDMA_IsrType

Specifies the GDMA interrupt types. This parameter can be a value of GDMA Interrupt Type.

u32 GDMA_ReloadSrc

Specifies the GDMA automatic source reload . This parameter can be the 0 or 1.(0 : disable / 1 : enable). If this value is set to 1, source address register can be automatically reloaded from its initial value at the end of every block for multi-block transfers. This parameter is only valid in multi block transmission mode.

u32 GDMA_ReloadDst

Specifies the GDMA automatic destination reload . This parameter can be the 0 or 1.(0 : disable / 1 : enable). If this parameter is set 1, destination address register can be automatically reloaded from its initial value at the end of every block for multi-block transfers. This parameter is only valid in multi block transmission mode.

u32 GDMA_LlpDstEn

Specifies the GDMA whether block chaining is enabled or disabled on the destination side only. This parameter is only valid in multi-block transmission mode.

u32 GDMA_LlpSrcEn

Specifies the GDMA whether block chaining is enabled or disabled on the source side only. This parameter is only valid in multi-block transmission mode.

u32 GDMA_SrcHandshakeInterface

Specifies the GDMA hardware handshaking interface for the source peripheral of a GDMA channel. This parameter can be a value of GDMA0 HS HandShake Interface.

u32 GDMA_DstHandshakeInterface

Specifies the GDMA hardware handshaking interface for the destination peripheral of a GDMA channel. This parameter can be a value of GDMA0 HS HandShake Interface.

u32 MuliBlockCunt

Specifies the GDMA Multi-block counter. This parameter is used in multi-block transmission.

u32 MaxMuliBlock

Specifies the GDMA Max block number in Multi-block transmission. This parameter is used in multi-block transmission.

u32 SecureTransfer

Specifies the GDMA secure transmission. This parameter is used in secure world of trustzone.

typedef struct GDMA_CH_LLI_ELE *PGDMA_CH_LLI_ELE
typedef struct GDMA_InitTypeDef *PGDMA_InitTypeDef

GDMA Exported Constants

GDMA0 HS HandShake Interface

/* Handshake interface for UART0 TX. */
#define GDMA_HANDSHAKE_INTERFACE_UART0_TX (0)

/* Handshake interface for UART0 RX. */
#define GDMA_HANDSHAKE_INTERFACE_UART0_RX (1)

/* Handshake interface for UART1 TX. */
#define GDMA_HANDSHAKE_INTERFACE_UART1_TX (2)

/* Handshake interface for UART1 RX. */
#define GDMA_HANDSHAKE_INTERFACE_UART1_RX (3)

/* Handshake interface for UART2 TX. */
#define GDMA_HANDSHAKE_INTERFACE_UART2_TX (4)

/* Handshake interface for UART2 RX. */
#define GDMA_HANDSHAKE_INTERFACE_UART2_RX (5)
RTL8721Dx: 
/* Handshake interface for SPI0 TX. */
#define GDMA_HANDSHAKE_INTERFACE_SPI0_TX (6)

/* Handshake interface for SPI0 RX. */
#define GDMA_HANDSHAKE_INTERFACE_SPI0_RX (7)

/* Handshake interface for SPI1 TX. */
#define GDMA_HANDSHAKE_INTERFACE_SPI1_TX (8)

/* Handshake interface for SPI1 RX. */
#define GDMA_HANDSHAKE_INTERFACE_SPI1_RX (9)

/* Handshake interface for SPIC TX. */
#define GDMA_HANDSHAKE_INTERFACE_SPIC_TX (10)

/* Handshake interface for SPIC RX. */
#define GDMA_HANDSHAKE_INTERFACE_SPIC_RX (11)

/* Handshake interface for SPORT0 FIFO0 TX. */
#define GDMA_HANDSHAKE_INTERFACE_SPORT0F0_TX (12)

/* Handshake interface for SPORT0 FIFO1 TX. */
#define GDMA_HANDSHAKE_INTERFACE_SPORT0F1_TX (13)

/* Handshake interface for SPORT0 FIFO0 RX. */
#define GDMA_HANDSHAKE_INTERFACE_SPORT0F0_RX (14)

/* Handshake interface for SPORT0 FIFO1 RX. */
#define GDMA_HANDSHAKE_INTERFACE_SPORT0F1_RX (15)

/* Handshake interface for SPORT1 FIFO0 TX. */
#define GDMA_HANDSHAKE_INTERFACE_SPORT1F0_TX (16)

/* Handshake interface for SPORT1 FIFO1 TX. */
#define GDMA_HANDSHAKE_INTERFACE_SPORT1F1_TX (17)

/* Handshake interface for SPORT1 FIFO0 RX. */
#define GDMA_HANDSHAKE_INTERFACE_SPORT1F0_RX (18)

/* Handshake interface for SPORT1 FIFO1 RX. */
#define GDMA_HANDSHAKE_INTERFACE_SPORT1F1_RX (19)

/* Handshake interface for LEDC TX. */
#define GDMA_HANDSHAKE_INTERFACE_LEDC_TX (20)

/* Handshake interface for I2C0 TX. */
#define GDMA_HANDSHAKE_INTERFACE_I2C0_TX (21)

/* Handshake interface for I2C0 RX. */
#define GDMA_HANDSHAKE_INTERFACE_I2C0_RX (22)

/* Handshake interface for I2C1 TX. */
#define GDMA_HANDSHAKE_INTERFACE_I2C1_TX (23)

/* Handshake interface for I2C1 RX. */
#define GDMA_HANDSHAKE_INTERFACE_I2C1_RX (24)

/* Handshake interface for Zigbee TX. */
#define GDMA_HANDSHAKE_INTERFACE_Zigbee_TX (NULL)

/* Handshake interface for Zigbee RX. */
#define GDMA_HANDSHAKE_INTERFACE_Zigbee_RX (NULL)

/* Handshake interface for ADC RX. */
#define GDMA_HANDSHAKE_INTERFACE_ADC_RX (NULL)

/* Handshake interface for Audio TX. */
#define GDMA_HANDSHAKE_INTERFACE_AUDIO_TX (NULL)

/* Handshake interface for Audio RX. */
#define GDMA_HANDSHAKE_INTERFACE_AUDIO_RX (NULL)

GDMA Data Size

/* Transfer width of one byte. */
#define TrWidthOneByte ((u32)0x00000000)

/* Transfer width of two bytes. */
#define TrWidthTwoBytes ((u32)0x00000001)

/* Transfer width of four bytes. */
#define TrWidthFourBytes ((u32)0x00000002)

/* Check if GDMA data size value is valid. */
#define IS_GDMA_DATA_SIZE (((SIZE) == TrWidthOneByte) || \
    ((SIZE) == TrWidthTwoBytes) || \
    ((SIZE) == TrWidthFourBytes))

GDMA Data Transfer Direction

/* Memory to memory transfer. */
#define TTFCMemToMem ((u32)0x00000000)

/* Memory to peripheral transfer. */
#define TTFCMemToPeri ((u32)0x00000001)

/* Peripheral to memory transfer. */
#define TTFCPeriToMem ((u32)0x00000002)

/* Peripheral to peripheral transfer. */
#define TTFCPeriToPeri ((u32)0x00000003)

/* Peripheral to memory, peripheral as flow controller. */
#define TTFCPeriToMem_PerCtrl ((u32)0x00000004)

/* Peripheral to peripheral, source peripheral as flow controller. */
#define TTFCPeriToPeri_SrcPerCtrl ((u32)0x00000005)

/* Memory to peripheral, peripheral as flow controller. */
#define TTFCMemToPeri_PerCtrl ((u32)0x00000006)

/* Peripheral to peripheral, destination peripheral as flow controller. */
#define TTFCPeriToPeri_DstPerCtrl ((u32)0x00000007)

/* Check if GDMA transfer direction value is valid. */
#define IS_GDMA_DIR (((DIR) == TTFCMemToMem) || \
    ((DIR) == TTFCMemToPeri) || \
    ((DIR) == TTFCPeriToMem) ||\
    ((DIR) == TTFCPeriToPeri) ||\
    ((DIR) == TTFCPeriToMem_PerCtrl) || \
    ((DIR) == TTFCPeriToPeri_SrcPerCtrl) || \
    ((DIR) == TTFCPeriToPeri_DstPerCtrl) || \
    ((DIR) == TTFCMemToPeri_PerCtrl))

GDMA Increment Mode

/* Address increment mode. */
#define IncType ((u32)0x00000000)

/* Address decrement mode. */
#define DecType ((u32)0x00000001)

/* Address no-change mode. */
#define NoChange ((u32)0x00000002)

/* Check if GDMA increment mode value is valid. */
#define IS_GDMA_IncMode (((STATE) == IncType) || \
    ((STATE) == DecType) || \
    ((STATE) == NoChange))

GDMA Index Channel Definition

/* Maximum GDMA index value. */
#define MAX_GDMA_INDX (0)

/* Maximum GDMA channel number. */
#define MAX_GDMA_CHNL (7)

/* Check if GDMA channel number is valid. */
#define IS_GDMA_ChannelNum ((NUM) <= MAX_GDMA_CHNL)

/* Check if GDMA index value is valid. */
#define IS_GDMA_Index ((NUM) <= MAX_GDMA_INDX)

GDMA Interrupt Type

/* DMA transfer complete interrupt type. */
#define TransferType ((u32)0x00000001)

/* DMA block transfer complete interrupt type. */
#define BlockType ((u32)0x00000002)

/* DMA transfer error interrupt type. */
#define ErrType ((u32)0x000000010)

/* Check if GDMA interrupt type configuration is valid. */
#define IS_GDMA_CONFIG_IT ((((IT) & 0xFFFFFFE0) == 0x00) && ((IT) != 0x00))

GDMA Msize

/* Burst transaction length of 1 item. */
#define MsizeOne ((u32)0x00000000)

/* Burst transaction length of 4 items. */
#define MsizeFour ((u32)0x00000001)

/* Burst transaction length of 8 items. */
#define MsizeEight ((u32)0x00000002)

/* Burst transaction length of 16 items. */
#define MsizeSixteen ((u32)0x00000003)

/* Burst transaction length of 32 items. */
#define Msize32 ((u32)0x00000004)

/* Burst transaction length of 64 items. */
#define Msize64 ((u32)0x00000005)

/* Burst transaction length of 128 items. */
#define Msize128 ((u32)0x00000006)

/* Burst transaction length of 256 items. */
#define Msize256 ((u32)0x00000007)

/* Check if GDMA Msize value is valid. */
#define IS_GDMA_MSIZE (((SIZE) == MsizeOne) || \
    ((SIZE) == MsizeFour) || \
    ((SIZE) == MsizeEight)|| \
    ((SIZE) == MsizeSixteen) || \
    ((SIZE) == Msize32) || \
    ((SIZE) == Msize64) || \
    ((SIZE) == Msize128) || \
    ((SIZE) == Msize256))

GDMA Reload Definition

/* Clean source auto-reload. */
#define CLEAN_RELOAD_SRC ((u32)0x00000001)

/* Clean destination auto-reload. */
#define CLEAN_RELOAD_DST ((u32)0x00000002)

/* Clean both source and destination auto-reload. */
#define CLEAN_RELOAD_SRC_DST ((u32)0x00000003)

GDMA Interrupt Status

RTL8721Dx:

Not supported.

GDMA Channel Status

RTL8721Dx:

Not supported.

GDMA Exported Functions

u8 GDMA_Abort(u8 GDMA_Index, u8 GDMA_ChNum)

Abort a channel.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

Returns:

TRUE if the channel is successfully aborted, FALSE otherwise.

void GDMA_ChCleanAutoReload(u8 GDMA_Index, u8 GDMA_ChNum, u32 CleanType)

Clear GDMA AutoReload bits for the specified channel.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

  • CleanType –

    This parameter can be any combination of the following values:

    • CLEAN_RELOAD_SRC

    • CLEAN_RELOAD_DST

u8 GDMA_ChnlAlloc(u32 GDMA_Index, IRQ_FUN IrqFun, u32 IrqData, u32 IrqPriority)

Allocate a free channel.

Parameters:

  • GDMA_Index – Always 0.

  • IrqFun – GDMA IRQ callback function.

  • IrqData – GDMA IRQ callback data.

  • IrqPriority – GDMA IrqPriority.

Returns:

Allocated GDMA channel number, or 0xFF if no free channel is available.

u8 GDMA_ChnlFIFOIsEmpty(u8 GDMA_Index, u8 GDMA_ChNum)

Get whether the FIFO is empty.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

Returns:

TRUE if the channel FIFO is empty, FALSE otherwise.

u8 GDMA_ChnlFree(u8 GDMA_Index, u8 GDMA_ChNum)

Free a channel, this channel will not be used.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

Returns:

TRUE if the channel is successfully freed, FALSE otherwise.

u32 GDMA_ClearINT(u8 GDMA_Index, u8 GDMA_ChNum)

Clear all the Pending Interrupt status.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

Returns:

Active interrupt types whose interrupt status is cleared, refer to GDMA Interrupt Type.

Note

Clear all the active interrupts status for the current GDMA channel.

u32 GDMA_ClearINTPendingBit(u8 GDMA_Index, u8 GDMA_ChNum, u32 GDMA_IT)

Clear the specified Pending Interrupt status.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

  • GDMA_IT –

    Specifies the GDMA interrupt sources whose interrupt status will be cleared. This parameter can be one or combinations of the following values:

    • TransferType

    • BlockType

    • ErrType

Returns:

Active interrupt types whose interrupt status is cleared, refer to GDMA Interrupt Type.

Note

This function completes clearing the specified type interrupt status. Which type interrupt status will be cleared, refer to the parameter “GDMA_IT”.

void GDMA_Cmd(u8 GDMA_Index, u8 GDMA_ChNum, u32 NewState)

GDMA channel Disable/Enable.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

  • NewState – Disable/Enable.

u32 GDMA_GetBlkSize(u8 GDMA_Index, u8 GDMA_ChNum)

Get the block transfer size configured for the specified GDMA channel.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

Returns:

Block size configured for the current GDMA channel.

u32 GDMA_GetDstAddr(u8 GDMA_Index, u8 GDMA_ChNum)

Get the destination writing address during DMA transmission.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

Returns:

Destination address.

u8 GDMA_GetIrqNum(u8 GDMA_Index, u8 GDMA_ChNum)

Get IRQ number for a channel.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

Returns:

IRQ number for the specified GDMA channel.

u32 GDMA_GetSrcAddr(u8 GDMA_Index, u8 GDMA_ChNum)

Get the source reading address during DMA transmission.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

Returns:

Source address.

void GDMA_INTConfig(u8 GDMA_Index, u8 GDMA_ChNum, u32 GDMA_IT, u32 NewState)

Enable or disable the specified GDMA interrupts.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

  • GDMA_IT –

    Specifies the GDMA interrupt sources to be enabled or disabled. This parameter can be one or combinations of the following values:

    • TransferType

    • BlockType

    • ErrType

  • NewState – DISABLE/ENABLE.

void GDMA_Init(u8 GDMA_Index, u8 GDMA_ChNum, PGDMA_InitTypeDef GDMA_InitStruct)

Initialize the GDMA registers according to the specified parameters in GDMA_InitStruct.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

  • GDMA_InitStruct – Pointer to a GDMA_InitTypeDef structure that contains the configuration information for the GDMA peripheral.

void GDMA_Resume(u8 GDMA_Index, u8 GDMA_ChNum)

Resume a channel.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

void GDMA_SetBlkSize(u8 GDMA_Index, u8 GDMA_ChNum, u32 BlkSize)

Set GDMA block size.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

  • BlkSize – Block transfer size.

void GDMA_SetChnlPriority(u8 GDMA_Index, u8 GDMA_ChNum, u32 ChnlPriority)

Set channel priority.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

  • ChnlPriority – Channel priority to set.

void GDMA_SetDstAddr(u8 GDMA_Index, u8 GDMA_ChNum, u32 DstAddr)

Set destination address.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

  • DstAddr – Destination address.

void GDMA_SetLLP(u8 GDMA_Index, u8 GDMA_ChNum, u32 MultiBlockCount, struct GDMA_CH_LLI *pGdmaChLli, u32 round)

Set LLP mode when use GDMA Linked List Pointer Register.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

  • MultiBlockCount – Block counts.

  • pGdmaChLli – LLP node list, point to a Linked List Item.

  • round –

    • 0 Linear list, last node id last one

    • 1 Last node is not the end.

void GDMA_SetSrcAddr(u8 GDMA_Index, u8 GDMA_ChNum, u32 SrcAddr)

Set source address.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

  • SrcAddr – Source address.

void GDMA_StructInit(PGDMA_InitTypeDef GDMA_InitStruct)

Fill each GDMA_InitStruct member with its default value.

Parameters:

  • GDMA_InitStruct – Pointer to a GDMA_InitTypeDef structure which will be initialized.

void GDMA_Suspend(u8 GDMA_Index, u8 GDMA_ChNum)

Suspend a channel.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

RTL8721Dx:
u8 GDMA_ChannelIsActive(u8 GDMA_Index, u8 GDMA_ChNum)

Check if the channel is active.

Parameters:

  • GDMA_Index – Always 0.

  • GDMA_ChNum – 0 ~ 7.

Returns:

TRUE if the channel is active, FALSE otherwise.

Mbed API

MBED_GDMA Exported Types

typedef u32 (*dma_irq_handler)(void *id)

DMA IRQ callback function type.

Structure Type

typedef struct gdma_s gdma_t

GDMA object type.

MBED_GDMA Exported Functions

void dma_memcpy(gdma_t *dma_obj, void *dst, void *src, uint32_t len)

Accomplish memory copy by DMA.

Parameters:

  • dma_obj – GDMA object defined in application software.

  • dst – Destination memory address.

  • src – Source memory address.

  • len – Copy data length.

void dma_memcpy_deinit(gdma_t *dma_obj)

Deinitialize the GDMA.

Parameters:

  • dma_obj – GDMA object defined in application software.

void dma_memcpy_init(gdma_t *dma_obj, dma_irq_handler handler, uint32_t id)

Initialize the GDMA.

Parameters:

  • dma_obj – GDMA object defined in application software.

  • handler – User-defined GDMA IRQ callback function.

  • id – User-defined GDMA IRQ callback parameter.