KM4 IMG3 BD RAM, can be merged into KM4 BD RAM if not required
x
KM4 BD RAM
0x2002_2000
280
KM4 BDRAM data, BSS and heap
√
KM0 BD RAM
0x2006_8000
96
KM0 BDRAM data, BSS and heap
√
KM4 BD PSRAM TZ
0x6000_0000
64
KM4 IMG3 PSRAM, can be merged into KM4 PSRAM if not required, size specified by CONFIG_TZ_S_SIZE
x
KM0 BD PSRAM
0x6001_0000
876
KM0 BD PSRAM code and data, size specified by CONFIG_PSRAM_KM0_IMG2_KB
√
KM4 BD PSRAM
0x600E_B000
7252
KM4 BD PSRAM code and data, occupying all remaining PSRAM space
√
Note
If TrustZone is not enabled, KM4BDRAMTZ and KM4BDPSRAMTZ will be configured as Non-secure regions and merged into KM4BDRAM and KM4BDPSRAM respectively.
The size of KM4TZ Bootloader is configuration-dependent; refer to Bootloader_RAM for details.
The PSRAM layout is partitioned according to the maximum PSRAM capacity supported by the chip (8MB for RTL8721Dx). The sizes of KM4BDPSRAMTZ and KM0BDPSRAM are specified by their respective Kconfig options; KM4BDPSRAM occupies all the remaining PSRAM space. The sizes listed in the table are default values only, and users may modify the above Kconfig options as needed.
At runtime, the system detects the actual PSRAM capacity based on the IC BD number and initializes the heap according to that actual capacity.
RTL8720E:
RAM layout With PSRAM
Note
If Trustzone is not enabled, the KM4_BD_PSRAM_TZ are non-secure and would be merged into KM4_BD_PSRAM.
The size of KM4TZ Bootloader is configuration-dependent; refer to Bootloader_RAM for details.
Item
Start address
Size
Description
Mandatory
SRAM FIXED
0x2000_0000
40KB
For ROM BSS, MSP …
√
KM4 BOOTLOADER
0x3000_A000
28KB
For Bootloader
√
KM4 BD RAM
0x2001_1000
348KB
KM4 BDRAM data, BSS and heap
√
KR4 BD RAM
0x2006_8000
96KB
KR4 BDRAM data, BSS and heap
√
KM4 BD PSRAM TZ
0x6000_0000
64KB
KM4 IMG3, size specified by CONFIG_TZ_S_SIZE, merged into KM4 BD PSRAM if not needed
x
KR4 BD PSRAM
0x6001_0000
1536KB
KR4 code, data, BSS and heap, size specified by CONFIG_PSRAM_KR4_IMG2_KB
√
KM4 BD PSRAM
0x6019_0000
14784KB
KM4 code, data, BSS and heap, occupying all remaining PSRAM space
√
Note
PSRAM is laid out from low to high address as TrustZone → KR4 → KM4, where KR4 immediately follows TZ, so resizing KM4 does not move KR4’s base. (When DSP is not enabled, KM4 occupies all the remaining PSRAM space; when DSP is enabled, KM4 has a fixed size and the remainder is allocated to the DSP.)
The PSRAM layout is partitioned according to the maximum PSRAM capacity supported by the chip (16MB). The sizes of KM4_BD_PSRAM_TZ and KR4BDPSRAM are specified by their respective Kconfig options; KM4BDPSRAM occupies all the remaining PSRAM space. The sizes listed in the table are default values only, and users may modify the above Kconfig options as needed.
At runtime, the system detects the actual PSRAM capacity based on the IC BD number and initializes the heap according to that actual capacity.
RAM layout Without PSRAM
Note
If Trustzone is not enabled, the KM4_BD_RAM_TZ are non-secure and would be merged into KM4_BD_RAM.
Item
Start address
Size
Description
Mandatory
SRAM FIXED
0x2000_0000
40KB
For ROM BSS, MSP …
√
KM4 BOOTLOADER
0x3000_A000
28KB
For Bootloader
√
KM4 BD RAM TZ
0x2001_1000
64KB
KM4 IMG3, can be used by users if IMG3 is not needed
x
KM4 BD RAM
0x2002_0000
288KB
KM4 BDRAM data, BSS and heap
√
KR4 BD RAM
0x2006_8000
96KB
KR4 BDRAM data, BSS and heap
√
RTL8710E:
RAM layout With PSRAM
Note
RTL8710E does not support TrustZone, so there is no dedicated TZ region in either PSRAM or SRAM. The size of Bootloader is configuration-dependent; refer to Bootloader_RAM for details.
Item
Start address
Size
Description
Mandatory
SRAM FIXED
0x2000_0000
40KB
For ROM BSS, MSP …
√
KM4 BOOTLOADER
0x3000_A000
28KB
For Bootloader
√
KM4 BD RAM
0x2001_1000
348KB
KM4 BDRAM data, BSS and heap
√
KR4 BD RAM
0x2006_8000
96KB
KR4 BDRAM data, BSS and heap
√
KR4 BD PSRAM
0x6000_0000
1536KB
KR4 code, data, BSS and heap, size specified by CONFIG_PSRAM_KR4_IMG2_KB
√
KM4 BD PSRAM
0x6018_0000
14848KB
KM4 code, data, BSS and heap, occupying all remaining PSRAM space
√
Note
RTL8710E does not support TrustZone. PSRAM is laid out from low to high address as KR4 → KM4, where KR4 starts at the PSRAM base and KM4 occupies all the remaining PSRAM space.
The PSRAM layout is partitioned according to the maximum PSRAM capacity supported by the chip (16MB). The size of KR4BDPSRAM is specified by Kconfig; KM4BDPSRAM occupies all the remaining PSRAM space. The sizes listed in the table are default values only, and users may modify the above Kconfig options as needed.
At runtime, the system detects the actual PSRAM capacity based on the IC BD number and initializes the heap according to that actual capacity.
RTL8726E:
Note
If Trustzone is not enabled, the KM4_BD_PSRAM_TZ are non-secure and would be merged into KM4_BD_PSRAM.
The size of KM4TZ Bootloader is configuration-dependent; refer to Bootloader_RAM for details.
Item
Start address
Size
Description
Mandatory
SRAM FIXED
0x2000_0000
40KB
For ROM BSS, MSP and so on
√
KM4 BOOTLOADER
0x3000_A000
28KB
For Bootloader
√
KM4_BD_PSRAM_TZ
0x6000_0000
64KB
KM4 IMG3, size specified by CONFIG_TZ_S_SIZE, merged into KM4 BD PSRAM if not needed
x
KR4 BD PSRAM
0x6001_0000
1536KB
KR4 code, data, BSS and heap, size specified by CONFIG_PSRAM_KR4_IMG2_KB
√
KM4 BD PSRAM
0x6019_0000
1472KB
KM4 code, data, BSS and heap, size specified by CONFIG_PSRAM_KM4_IMG2_KB (TZ excluded)
√
DSP BD PSRAM
0x6030_0000
13312KB
DSP code, data and heap, occupying all remaining PSRAM space
√
Note
PSRAM is laid out from low to high address as TrustZone → KR4 → KM4 → DSP, where KR4 immediately follows TZ, so resizing KM4/DSP does not move KR4’s base.
The PSRAM layout is partitioned according to the maximum PSRAM capacity supported by the chip (16MB). The sizes of KM4_BD_PSRAM_TZ, KR4BDPSRAM and KM4BDPSRAM are specified by their respective Kconfig options; DSPBDPSRAM occupies all the remaining PSRAM space. The sizes listed in the table are default values only, and users may modify the above Kconfig options as needed.
At runtime, the system detects the actual PSRAM capacity based on the IC BD number and initializes the heap according to that actual capacity.
RTL8713E:
Note
RTL8713E does not support TrustZone, so there is no dedicated TZ region in PSRAM. The size of Bootloader is configuration-dependent; refer to Bootloader_RAM for details.
Item
Start address
Size
Description
Mandatory
SRAM FIXED
0x2000_0000
40KB
For ROM BSS, MSP and so on
√
KM4 BOOTLOADER
0x3000_A000
28KB
For Bootloader
√
KR4 BD PSRAM
0x6000_0000
1536KB
KR4 code, data, BSS and heap, size specified by CONFIG_PSRAM_KR4_IMG2_KB
√
KM4 BD PSRAM
0x6018_0000
1536KB
KM4 code, data, BSS and heap, size specified by CONFIG_PSRAM_KM4_IMG2_KB
√
DSP BD PSRAM
0x6030_0000
13312KB
DSP code, data and heap, occupying all remaining PSRAM space
√
Note
RTL8713E does not support TrustZone. PSRAM is laid out from low to high address as KR4 → KM4 → DSP, where KR4 starts at the PSRAM base and DSP occupies all the remaining PSRAM space. The DSP segment always starts at 0x6030_0000.
The PSRAM layout is partitioned according to the maximum PSRAM capacity supported by the chip (16MB). The sizes of KR4BDPSRAM and KM4BDPSRAM are specified by their respective Kconfig options; DSPBDPSRAM occupies all the remaining PSRAM space. The sizes listed in the table are default values only, and users may modify the above Kconfig options as needed.
At runtime, the system detects the actual PSRAM capacity based on the IC BD number and initializes the heap according to that actual capacity.
RTL8730E:
Item
Sub-item
Physical address
Size
Description
Mandatory
KM4 DRAM
KM4_IMG2_RAM_NS
0x6000_0000
1388KB
KM4 image2 SRAM, including code, data, BSS and heap
√
KM4_BD_RAM_NSC
0x6015_B000
4KB
KM4 Non-secure Callable region
x
KM4_BD_RAM_ENTRY
0x6015_C000
16KB
KM4 Non-secure Callable function entry
x
KM4_BD_RAM_S
0x7016_0000
128KB
KM4 secure image, including secure code, data, BSS and heap
x
KM4_DRAM_HEAP_EXT
0x6070_0000
1MB
KM4 heap extend
√
CA32 DARM
BL1_RO
0x6018_0000
128KB
AP BL1 code and RO data
√
BL1_RW
0x601A_0000
64KB
AP BL1 Stack and BSS
√
SHARED_RAM
0x601B_0000
64KB
AP shared memory for multi-core
√
BL2
0x601C_0000
256KB
AP BL2 code, data, stack and BSS
√
BL32
0x6020_0000
1MB
AP BL32 code, data, stack and BSS
For FreeRTOS SDK, BL32 is SP_MIN.
√
BL33
0x6030_0000
4MB
AP BL33 code, data, stack and BSS
For FreeRTOS SDK, BL33 is image2 (application).
√
KM4 SRAM
KM4_BOOT_RAM_S
0x3000_3000
68KB
KM4 Secure bootloader, including data and code
√
KM4_BD_RAM
0x2001_4000
28KB
KM4 MAIN SRAM, used when XIP only
x
ATF SHARE SRAM
0x3001_F000
3.5KB
used for atf share ram when XIP only
x
CA32_BL1 SRAM_S
0x3001_FE00
512B
CA32 BL1 SRAM
√
RSVD for Audio
0x2002_0000
128KB
Reserved for Audio
√
KM0 SRAM
KM0_BD_RAM
0x2300_2000
119.25KB
KM0 image2 SRAM, including code, data, BSS and heap
√
IPC_MEM
0x2301_FD00
768B
Buffer for IPC between CPUs
√
Note
If Trustzone is not enabled, the KM4BDRAMTZ and KM4BDPSRAMTZ are non-secure and would be merged into KM4BDRAM and KM4BDPSRAM, respectively.
RTL8721F:
Item
Start address
Size (KB)
Description
Mandatory
SRAM FIXED
0x2000_0000
20
For ROM BSS, MSP, etc.
√
KM4TZ Bootloader
0x3000_5000
32
KM4TZ secure bootloader, including code and data
√
KM4TZ BD RAM TZ
0x2000_D000
64
KM4TZ IMG3 BD RAM, can be merged into KM4TZ BD RAM if not required
x
KM4TZ BD RAM
0x2001_D000
300
KM4TZ BDRAM data, BSS and heap
√
KM4NS BD RAM
0x2006_8000
96
KM4NS BDRAM data, BSS and heap
√
KM4TZ BD PSRAM TZ
0x6000_0000
64
KM4TZ IMG3 PSRAM, can be merged into KM4TZ PSRAM if not required, size specified by CONFIG_TZ_S_SIZE
x
KM4NS BD PSRAM
0x6001_0000
876
KM4NS BD PSRAM code, data and heap, size specified by CONFIG_PSRAM_KM4NS_IMG2_KB
√
KM4TZ BD PSRAM
0x600E_B000
15444
KM4TZ BD PSRAM code, data and heap, occupying all remaining PSRAM space
√
Note
If TrustZone is not enabled, KM4TZBDRAMTZ and KM4TZBDPSRAMTZ will be configured as Non-secure regions and merged into KM4TZBDRAM and KM4TZBDPSRAM respectively.
The size of KM4TZ Bootloader is configuration-dependent; refer to Bootloader_RAM for details.
The PSRAM layout is partitioned according to the maximum PSRAM capacity supported by the chip (16MB for RTL8721F). The sizes of KM4TZBDPSRAMTZ and KM4NSBDPSRAM are specified by their respective Kconfig options; KM4TZBDPSRAM occupies all the remaining PSRAM space. The sizes listed in the table are default values only, and users may modify the above Kconfig options as needed.
At runtime, the system detects the actual PSRAM capacity based on the IC BD number and initializes the heap according to that actual capacity.
RTL8720F:
Item
Start address
Size (KB)
Description
Mandatory
SRAM FIXED
0x2000_0000
8
For ROM BSS, MSP, etc.
√
KM4TZ Bootloader
0x3000_2000
4
KM4TZ secure bootloader, including code and data
√
KM4TZ BD RAM TZ
0x2000_3000
64
KM4TZ IMG3 BD RAM, can be merged into KM4TZ BD RAM if not required
x
KM4TZ BD RAM
0x2001_3800
242
KM4TZ BDRAM data, BSS and heap
√
KM4NS BD RAM
0x2005_0000
192
KM4NS BDRAM data, BSS and heap
√
KM4TZ BD PSRAM TZ
0x6000_0000
64
KM4TZ IMG3 PSRAM, can be merged into KM4TZ PSRAM if not required, size specified by CONFIG_TZ_S_SIZE
x
KM4NS BD PSRAM
0x6001_0000
876
KM4NS BD PSRAM code, data and heap, size specified by CONFIG_PSRAM_KM4NS_IMG2_KB
√
KM4TZ BD PSRAM
0x600E_B000
7252
KM4TZ BD PSRAM code, data and heap, occupying all remaining PSRAM space
√
Note
If TrustZone is not enabled, KM4TZBDRAMTZ and KM4TZBDPSRAMTZ will be configured as Non-secure regions and merged into KM4TZBDRAM and KM4TZBDPSRAM respectively.
The size of KM4TZ Bootloader is configuration-dependent; refer to Bootloader_RAM for details.
The PSRAM layout is partitioned according to the maximum PSRAM capacity supported by the chip. The sizes of KM4TZBDPSRAMTZ and KM4NSBDPSRAM are specified by their respective Kconfig options; KM4TZBDPSRAM occupies all the remaining PSRAM space. The sizes listed in the table are default values only, and users may modify the above Kconfig options as needed.
At runtime, the system detects the actual PSRAM capacity based on the IC BD number and initializes the heap according to that actual capacity.
RTL8735C:
Item
Start address
Size
Description
Mandatory
NP_PSRAM
0x2000_0020
2MB - 32B
NP PSRAM memory
√
VP_PSRAM
0x2020_0020
~1.8MB
VP PSRAM memory
√
NP_PSRAM_S
0x3000_0020
NP PSRAM secure section
√
AP_PSRAM_SECURE0
0x303C_FFE0
188KB
AP secure section0
√
AP_PSRAM_SECURE1
0x303F_F000
4KB
AP secure section 1
√
Item
Start address
Size
Description
Mandatory
AP_DDR_SECURE0
0xA000_0000
1MB
AP secure section 0
√
AP_DDR_SECURE1
0xA010_0000
1MB
AP secure section 1
√
AP_DDR_SECURE2
0xA020_1000
124KB
AP secure section 3
√
AP_DDR_RO
0x8022_0000
3MB
AP read-only region
√
AP_DDR
0x8050_0000
~45MB
AP main memory
√
AP_DDR_STK
0x831C_0000
256KB
AP stack region
√
VP_DDR
0x8320_0000
66MB
VP memory
√
NN_DDR
0x8740_0000
12MB
Neural network memory
√
Note
If TrustZone is enabled, part of NP_PSRAM is reserved as the secure section NP_PSRAM_S, and the remaining NP_PSRAM is used as non-secure memory with a reduced size.
menuconfig provides configuration options for controlling code/data loading locations. Navigate to CONFIG Link Option
IMG1(Bootloader) running on FLASH or SRAM? (FLASH) --->[ ] Enable PQC Secure Boot for IMG1 (requires +12KB SRAM)IMG2(Application) running on FLASH or PSRAM? (FLASH) --->IMG2 Data and Heap in SRAM or PSRAM? (SRAM) --->[*] PSRAM_ALL_FOR_AP_HEAP
Option descriptions:
IMG1(Bootloader)runningonFLASHorSRAM? :
FLASH : Entire bootloader code runs from FLASH.
SRAM : Load full bootloader code into SRAM. Typically used for high-security scenarios with sufficient SRAM space.
EnablePQCSecureBootforIMG1(requires+12KBSRAM) :
Enable Post-Quantum Cryptography (ML-DSA-65) secure boot verification for IMG1 bootloader. Only available when IMG1 –> SRAM is selected.
When enabled, KM4_IMG1_SIZE increases from 32KB to 44KB (+12KB).
The additional 12KB is taken from KM4_IMG2_SIZE.
IMG2(Application)runningonFLASHorPSRAM? :
FLASH: Execute application code directly from FLASH (NOR FLASH only).
PSRAM: Load application code into PSRAM for faster execution or higher security requirements.
IMG2DataandHeapinSRAMorPSRAM? :
SRAM: Application data and heap are allocated in SRAM.
PSRAM: Application data and heap are allocated in PSRAM for scenarios requiring larger heap space.
PSRAM_ALL_FOR_AP_HEAP :
Allocate all PSRAM space to application heap.
Only available when IMG2-->PSRAM and Data&Heap-->PSRAM are not selected.
Note
Verify PSRAM integration (internal/external) before selecting PSRAM-related options.
RTL8720E:
menuconfig provides configuration options for controlling code/data loading locations. Navigate to CONFIG Link Option
IMG1(Bootloader) running on FLASH or SRAM? (FLASH) --->IMG2(Application) running on FLASH or PSRAM? (FLASH) --->IMG2 Data and Heap in SRAM or PSRAM? (SRAM) --->[*] ALL PSRAM USED FOR APPLICATION HEAP
Option descriptions:
IMG1(Bootloader)runningonFLASHorSRAM? :
FLASH : Entire bootloader code runs from FLASH.
SRAM : Load full bootloader code into SRAM. Typically used for high-security scenarios with sufficient SRAM space.
IMG2(Application)runningonFLASHorPSRAM? :
FLASH: Execute application code directly from FLASH (NOR FLASH only).
PSRAM: Load application code into PSRAM for faster execution or higher security requirements.
IMG2DataandHeapinSRAMorPSRAM? :
SRAM: Application data and heap allocated in SRAM. This is the default option but unavailable when DSP is enabled.
PSRAM: Application data and heap allocated in PSRAM.
ALLPSRAMUSEDFORAPPLICATIONHEAP:
When enabled (default), all remaining PSRAM space is allocated to application heap.
Only available when neither IMG2_PSRAM nor DATA_HEAP_PSRAM is selected, and MP_SHRINK is not enabled.
Note
When TrustZone is enabled, an additional option IMG3(SecureImage)runningonPSRAMorSRAM? appears with SRAM as default.
Verify PSRAM integration (internal/external) before selecting PSRAM-related options.
RTL8710E:
menuconfig provides configuration options for controlling code/data loading locations. Navigate to CONFIG Link Option
IMG1(Bootloader) running on FLASH or SRAM? (FLASH) --->IMG2(Application) running on FLASH or PSRAM? (FLASH) --->IMG2 Data and Heap in SRAM or PSRAM? (SRAM) --->[*] ALL PSRAM USED FOR APPLICATION HEAP
Option descriptions:
IMG1(Bootloader)runningonFLASHorSRAM? :
FLASH : Entire bootloader code runs from FLASH.
SRAM : Load full bootloader code into SRAM. Typically used for high-security scenarios with sufficient SRAM space.
IMG2(Application)runningonFLASHorPSRAM? :
FLASH: Execute application code directly from FLASH (NOR FLASH only).
PSRAM: Load application code into PSRAM for faster execution or higher security requirements.
IMG2DataandHeapinSRAMorPSRAM? :
SRAM: Application data and heap allocated in SRAM. This is the default option but unavailable when DSP is enabled.
PSRAM: Application data and heap allocated in PSRAM.
ALLPSRAMUSEDFORAPPLICATIONHEAP:
When enabled (default), all remaining PSRAM space is allocated to application heap.
Only available when neither IMG2_PSRAM nor DATA_HEAP_PSRAM is selected, and MP_SHRINK is not enabled.
Note
When TrustZone is enabled, an additional option IMG3(SecureImage)runningonPSRAMorSRAM? appears with SRAM as default.
Verify PSRAM integration (internal/external) before selecting PSRAM-related options.
RTL8726E:
menuconfig provides configuration options for controlling code/data loading locations. Navigate to CONFIG Link Option
IMG1(Bootloader) running on FLASH or SRAM? (FLASH) --->IMG2(Application) running on FLASH or PSRAM? (FLASH) --->IMG2 Data and Heap in SRAM or PSRAM? (SRAM) --->[*] ALL PSRAM USED FOR APPLICATION HEAP
Option descriptions:
IMG1(Bootloader)runningonFLASHorSRAM? :
FLASH : Entire bootloader code runs from FLASH.
SRAM : Load full bootloader code into SRAM. Typically used for high-security scenarios with sufficient SRAM space.
IMG2(Application)runningonFLASHorPSRAM? :
FLASH: Execute application code directly from FLASH (NOR FLASH only).
PSRAM: Load application code into PSRAM for faster execution or higher security requirements.
IMG2DataandHeapinSRAMorPSRAM? :
SRAM: Application data and heap allocated in SRAM. This is the default option but unavailable when DSP is enabled.
PSRAM: Application data and heap allocated in PSRAM.
ALLPSRAMUSEDFORAPPLICATIONHEAP:
When enabled (default), all remaining PSRAM space is allocated to application heap.
Only available when neither IMG2_PSRAM nor DATA_HEAP_PSRAM is selected, and MP_SHRINK is not enabled.
Note
When TrustZone is enabled, an additional option IMG3(SecureImage)runningonPSRAMorSRAM? appears with SRAM as default.
Verify PSRAM integration (internal/external) before selecting PSRAM-related options.
RTL8713E:
menuconfig provides configuration options for controlling code/data loading locations. Navigate to CONFIG Link Option
IMG1(Bootloader) running on FLASH or SRAM? (FLASH) --->IMG2(Application) running on FLASH or PSRAM? (FLASH) --->IMG2 Data and Heap in SRAM or PSRAM? (SRAM) --->[*] ALL PSRAM USED FOR APPLICATION HEAP
Option descriptions:
IMG1(Bootloader)runningonFLASHorSRAM? :
FLASH : Entire bootloader code runs from FLASH.
SRAM : Load full bootloader code into SRAM. Typically used for high-security scenarios with sufficient SRAM space.
IMG2(Application)runningonFLASHorPSRAM? :
FLASH: Execute application code directly from FLASH (NOR FLASH only).
PSRAM: Load application code into PSRAM for faster execution or higher security requirements.
IMG2DataandHeapinSRAMorPSRAM? :
SRAM: Application data and heap allocated in SRAM. This is the default option but unavailable when DSP is enabled.
PSRAM: Application data and heap allocated in PSRAM.
ALLPSRAMUSEDFORAPPLICATIONHEAP:
When enabled (default), all remaining PSRAM space is allocated to application heap.
Only available when neither IMG2_PSRAM nor DATA_HEAP_PSRAM is selected, and MP_SHRINK is not enabled.
Note
When TrustZone is enabled, an additional option IMG3(SecureImage)runningonPSRAMorSRAM? appears with SRAM as default.
Verify PSRAM integration (internal/external) before selecting PSRAM-related options.
RTL8730E:
menuconfig provides configuration options for controlling code/data loading locations. Navigate to CONFIG Link Option
IMG1(Bootloader) running on SRAM? (SRAM) --->IMG2(Application) running on PSRAM or FLASH? (PSRAM) --->
Option descriptions:
IMG1(Bootloader)runningonSRAM? :
SRAM : Load full bootloader code into SRAM. This is the only option for AmebaSmart, which uses fixed SRAM allocation for bootloader execution.
IMG2(Application)runningonPSRAMorFLASH? :
PSRAM: Load application code into PSRAM for faster execution. This is the default option but unavailable when CP_TEST_CA32 is enabled.
FLASH: Execute application code directly from FLASH (NOR FLASH only). Used when PSRAM is not available or when CP_TEST_CA32 is enabled.
Note
Verify PSRAM integration (internal/external) before selecting PSRAM-related options.
RTL8721F:
menuconfig provides configuration options for controlling code/data loading locations. Navigate to CONFIG Link Option
IMG1(Bootloader) running on FLASH or SRAM? (FLASH) --->IMG2(Application) running on FLASH, SRAM, or PSRAM? (FLASH) --->IMG2 Data and Heap in SRAM or PSRAM? (SRAM) --->[*] ALL PSRAM USED FOR APPLICATION HEAP
Option descriptions:
IMG1(Bootloader)runningonFLASHorSRAM? :
FLASH : Entire bootloader code runs from FLASH.
SRAM : Load full bootloader code into SRAM. Typically used for high-security scenarios with sufficient SRAM space.
IMG2(Application)runningonFLASH,SRAM,orPSRAM? :
FLASH: Execute application code directly from FLASH (NOR FLASH only).
SRAM: Load application code into SRAM for faster execution.
PSRAM: Load application code into PSRAM for faster execution or higher security requirements.
IMG2DataandHeapinSRAMorPSRAM? :
SRAM: Application data and heap allocated in SRAM. This is the default option.
PSRAM: Application data and heap allocated in PSRAM.
ALLPSRAMUSEDFORAPPLICATIONHEAP:
When enabled (default), all remaining PSRAM space is allocated to application heap.
Only available when neither IMG2_PSRAM nor DATA_HEAP_PSRAM is selected, MP_SHRINK is not enabled, and WIFI_HOST_CONTROL is disabled (WHC_DEV_MENU does not support PSRAM).
Note
When TrustZone is enabled, an additional option IMG3(SecureImage)runningonSRAM,PSRAMorFLASH? appears with SRAM as default.
Verify PSRAM integration (internal/external) before selecting PSRAM-related options.
RTL8720F:
menuconfig provides configuration options for controlling code/data loading locations. Navigate to CONFIG Link Option
IMG1(Bootloader) running on FLASH or SRAM? (FLASH) --->IMG2(Application) running on FLASH, SRAM, or PSRAM? (FLASH) --->IMG2 Data and Heap in SRAM or PSRAM? (SRAM) --->[*] ALL PSRAM USED FOR APPLICATION HEAP
Option descriptions:
IMG1(Bootloader)runningonFLASHorSRAM? :
FLASH : Entire bootloader code runs from FLASH.
SRAM : Load full bootloader code into SRAM. Typically used for high-security scenarios with sufficient SRAM space.
IMG2(Application)runningonFLASH,SRAM,orPSRAM? :
FLASH: Execute application code directly from FLASH (NOR FLASH only).
SRAM: Load application code into SRAM for faster execution or higher security requirements.
PSRAM: Load application code into PSRAM for faster execution or higher security requirements.
IMG2DataandHeapinSRAMorPSRAM? :
SRAM: Load application data and heap into SRAM.
PSRAM: Load application data and heap into PSRAM.
ALLPSRAMUSEDFORAPPLICATIONHEAP: Allocate all PSRAM free space to application heap.
Note
Verify PSRAM integration (internal/external) before selecting PSRAM-related options.
RTL8735C:
menuconfig provides configuration options for controlling code/data loading locations. Navigate to CONFIG Link Option
IMG1(Bootloader) running on SRAM? (SRAM) --->IMG2(FP Application) running on SRAM (SRAM) --->IMG2(NP Application) running on PSRAM (PSRAM) --->IMG2(VP Application) running on PSRAM? (PSRAM) --->IMG2(AP Application) running on DDR? (DDR) --->
Option descriptions:
IMG1(Bootloader)runningonSRAM? : Bootloader code is loaded into SRAM for execution.
IMG2(FPApplication)runningonSRAM : FP (Function Processor) application code runs from SRAM.
IMG2(NPApplication)runningonPSRAM : NP (Network Processor) application code runs from PSRAM.
IMG2(VPApplication)runningonPSRAM? : VP (Video Processor) application code runs from PSRAM.
IMG2(APApplication)runningonDDR? : AP (Application Processor) application code runs from DDR.
Note
Memory assignments for RTL8735C are fixed per processor core. Each processor is allocated a specific memory type based on its role and performance requirements.
Remaining SRAM space (after Fixed RAM and IMG1 allocation) is distributed to KM4_IMG3, KM0_IMG2, and KM4_IMG2. KM4_RAM_TZ_SIZE (controlled by CONFIG_TZ_S_SIZE) defines the TZ region’s SRAM size, RAM_KM0_IMG2_SIZE defines KM0_IMG2’s size. Users can adjust these values.
PSRAM space allocation sequence: KM4_IMG3 -> KM4_IMG2 -> KM0_IMG2. Default size 4MB (PSRAM_BASE to PSRAM_END). Adjust PSRAM_END for actual PSRAM size.
To reallocate space between PSRAM_BASE-PSRAM_END: Modify KM4_PSRAM_TZ_SIZE (controlled by CONFIG_TZ_S_SIZE) for the TZ region (KM4_IMG3), PSRAM_KM4_IMG2_SIZE for KM4_IMG2. Remaining space goes to KM0_IMG2.
Space after PSRAM_END (if exists) can be used as extended heap xxx_PSRAM_HEAP_EXT (disabled by default).
KM4_BD_RAM and KR4_BD_RAM allocate all remaining SRAM space (excluding IMG1 and Fixed RAM). Modify RAM_KR4_IMG2_SIZE or RAM_KM4_IMG2_SIZE to adjust their allocation ratio.
PSRAM space between PSRAM_BASE to PSRAM_DSP_START is allocated to TZ region (KM4_IMG3), KM4_IMG2 and KR4_IMG2. Adjust via KM4_PSRAM_TZ_SIZE (controlled by CONFIG_TZ_S_SIZE) for the TZ region, PSRAM_KM4_IMG2_SIZE for KM4_IMG2, remaining space goes to KR4_IMG2.
Space after PSRAM_DSP_START can be: 1) Used as extended heap 2) Merged into BD_PSRAM by adjusting PSRAM_DSP_START (keep within PSRAM physical range).
KM4_BD_RAM and KR4_BD_RAM allocate all remaining SRAM space (excluding IMG1 and Fixed RAM). Modify RAM_KR4_IMG2_SIZE or RAM_KM4_IMG2_SIZE to adjust their allocation ratio.
PSRAM space between PSRAM_BASE to PSRAM_DSP_START is allocated to TZ region (KM4_IMG3), KM4_IMG2 and KR4_IMG2. Adjust via KM4_PSRAM_TZ_SIZE (controlled by CONFIG_TZ_S_SIZE) for the TZ region, PSRAM_KM4_IMG2_SIZE for KM4_IMG2, remaining space goes to KR4_IMG2.
Space after PSRAM_DSP_START can be: 1) Used as extended heap 2) Merged into BD_PSRAM by adjusting PSRAM_DSP_START (keep within PSRAM physical range).
Space between PSRAM_BASE-PSRAM_DSP_START: Allocated to TZ region (KM4_IMG3)/KM4_IMG2/KR4_IMG2 in order. Adjust via KM4_PSRAM_TZ_SIZE (controlled by CONFIG_TZ_S_SIZE) for the TZ region, PSRAM_KM4_IMG2_SIZE for KM4_IMG2, remaining space goes to KR4_IMG2.
PSRAM_DSP_START-PSRAM_END: For DSP (adjust PSRAM_END per actual PSRAM size)
Beyond PSRAM_END (if any): Available as xxx_PSRAM_HEAP_EXT (disabled by default)
Space between PSRAM_BASE-PSRAM_DSP_START: Allocated to TZ region (KM4_IMG3)/KM4_IMG2/KR4_IMG2 in order. Adjust via KM4_PSRAM_TZ_SIZE (controlled by CONFIG_TZ_S_SIZE) for the TZ region, PSRAM_KM4_IMG2_SIZE for KM4_IMG2, remaining space goes to KR4_IMG2.
PSRAM_DSP_START-PSRAM_END: For DSP (adjust PSRAM_END per actual PSRAM size)
Beyond PSRAM_END (if any): Available as xxx_PSRAM_HEAP_EXT (disabled by default)
Remaining SRAM (after Fixed RAM and IMG1) allocated to KM4TZ_IMG3/KM4NS_IMG2/KM4TZ_IMG2. Adjust via KM4TZ_RAM_TZ_SIZE (KM4TZ_IMG3, controlled by CONFIG_TZ_S_SIZE), RAM_KM4NS_IMG2_SIZE (KM4NS_IMG2), remaining space → KM4TZ_IMG2
Remaining SRAM (after Fixed RAM and IMG1) allocated to KM4TZ_IMG3/KM4NS_IMG2/KM4TZ_IMG2. SRAM space for KM4TZ_IMG3 is defined by KM4TZ_RAM_TZ_SIZE, and for KM4NS_IMG2 by RAM_KM4NS_IMG2_SIZE (adjustable). Remaining space → KM4TZ_IMG2.
PSRAM allocation order: KM4TZ_IMG3 → KM4TZ_IMG2 → KM4NS_IMG2. Default 4MB range defined by PSRAM_BASE (fixed) and PSRAM_END (adjustable)
Adjust via KM4TZ_PSRAM_TZ_SIZE (controlled by TZ_S_SIZE) for the TZ region (KM4TZ_IMG3); PSRAM_KM4TZ_IMG2_SIZE is derived as 3220K − TZ size; remaining space → KM4NS_IMG2
Beyond PSRAM_END (if any): Available as xxx_PSRAM_HEAP_EXT (disabled by default)
RTL8735C:
No BD_RAM region is defined in this SDK. However, users can still adjust these variables to modify the memory allocation for each CPU.