Overview

The OTPC is an embedded non-volatile memory based on Anti-fuse technology, featuring a high level of hardware security. Its core characteristic is data immutability: the default initial state of the physical region is 1, which supports only a one-time, irreversible programming to 0.

The logical zone serves as a virtual extension of the physical zone. Through specific mapping algorithms, the “write-once” characteristic of the physical zone is transformed into a “multi-time modifiable” functionality for the logical zone, allowing users to update configuration information multiple times within certain limits.

OTP Layout

The OTP layout is shown in the figure below.

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Note

Refer to the corresponding User Manual for the detailed layout of each OTP partition.

Physical Zone

The size of the physical zone is 0x800 bytes. Its layout has been predefined by Realtek and includes the mapping zone, security zone, user-defined physical zone, ROM code patch zone, and hidden physical zone.

Caution

The physical zone only supports a one-time, irreversible write from 1 to 0. Please operate with caution.

Physical Zone Partition	Address	Description	Usage
Mapping Zone	(0x000-0x1FF, 512 bytes)	Mapped to the logical zone	-
Security Zone	(0x200-0x37F, 384 bytes)	Stores various keys and related configurations	Security Zone Usage
User-defined Physical Zone	(0x380-0x4FF, 384 bytes)	For user’s free use	User-defined Physical Zone Usage
ROM Code Patch Zone	(0x500-0x6FF, 512 bytes)	Used for applying patches to ROM code	ROM Code Patch Zone Usage
Hidden Physical Zone	(0x700-0x7FF, 256 bytes)	Used for functions like RMA	Hidden Physical Zone Usage

Logical Zone

The logical zone （0x000 ~ 0x3FF，1024 bytes） is a virtual space constructed from the physical mapping zone (0x000 ~ 0x1FF, 512 bytes) via a Realtek proprietary protocol, supporting multiple data modifications. This zone provides a wider addressable space of 0x400 bytes. This address extension is a logical abstraction implemented by the mapping mechanism, rather than an increase in physical capacity. Users only need to program the required logical addresses without concerning themselves with the underlying physical bit mapping details.

The mapping relationship is shown in the figure below:

Each block of data in the logical zone occupies one frame in the mapping zone. The hardware sequentially scans the content of each frame in the mapping zone and maps the data to the logical zone. When multiple frames map to the same address in the logical zone, the hardware uses the data from the last frame, which allows the logical zone to be modified multiple times.

Note

• Refer to the corresponding User Manual for the detailed mapping relationship between the logical zone and the mapping zone.

• Each modification to the value of the logical zone occupies one frame in the mapping zone. Therefore, when the mapping zone is full, the logical zone can no longer be modified.

The layout of the logical zone has been predefined by Realtek and includes the system data zone, user-defined MTP zone, calibration zone, etc.

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Logical Zone Partition	Address	Description	Usage
System data zone	(0x000-0x01F, 32 bytes)	Stores system data.	System data zone usage
Wi-Fi Calibration zone	(0x020-0x13F, 288 bytes)	Stores Wi-Fi calibration data.	-
HCI-USB	(0x150-0x15F, 16 bytes)	Stores configuration data related to USB devices.	-
Cap-Touch Calibration zone	(0x160-0x16F, 16 bytes)	Stores Cap-Touch calibration data.	-
User-defined MTP zone	(0x170-0x19F, 48 bytes)	For user’s free use.	User-defined MTP zone usage
BT parameters zone	(0x1B0-0x1FF, 80 bytes)	Stores BT parameters.	-