Internal IPs

• Chip information
  • Introduction
  • 生产记录信息
  • Re-mark信息
  • 封装信息
  • Chip ID and Chip version
  • 使用Chip Information
  • Registers
• BootSelect
  • Boot Select Flow
  • Boot Source
  • Boot from Internal/External FLASH
  • Boot from NOR/NAND FLASH
  • 支持的其他 Boot 配置
  • 汇总
  • Test mode
  • boot pinmux 配置
• Power-on Latch
  • Power-on Latch Pins
  • Power-on Logic
  • Power-on Latch Time
  • Default Status
  • Functional Description
• OSC4M
  • Introduction
  • Features
  • Functional Description
• System Tick (SysTick) Timer
  • Features
  • Functional Description
  • Registers
  • SysTick Timer Configuration
• System Memory
  • Introduction
  • Features
  • Block Diagram
  • Design Implementation
  • HW bug
  • Register
  • Operation Flow
• Power Management
  • Power Architecture
  • Power Cut control
  • Clock Control
  • LDO_1.8V
  • HW Global External Interrupt Mask
  • Sleep Power and Clock Control Flow
  • Deep Sleep Power Control Flow
  • Power Mode
  • SWR XTAL Arbiter
  • Memory Control
  • Top Level Interface
  • Design implementation
• LS_SDM
  • Introduction
  • Features
  • Functional Description
  • Registers
  • Top Level
  • Design Implementation
  • Operation Flow
  • Corner Case and Exception
• Elliptic Curve Signature Algorithm (ECDSA)
  • Overall Description
  • Features
  • Block Diagram
  • Functional Description
  • Registers
  • Flow Chart
  • I/O Ports
• Edwards-curve Digital Signature Algorithm (EdDSA)
  • Overall Description
  • Functional Description
  • Registers
• PSRAM
  • Introduction
  • Functional Description
  • Register
• PSRAM AXI Clutch
  • Introduction
  • Features
  • Functional Description
  • Registers
  • Operation Flow
  • Top Level Interface
  • Design Implementation
  • Corner Case and Exception
  • Design Flow Notes
• LOGUART
  • Introduction
  • Features
  • Functional Description
  • Registers
  • Top Level Interface
  • Design Implementation
  • Corner Case and Exception
  • Design Flow Notes
• LOGUART Share PAD
  • Introduction
  • Functional Description
  • Design Flow Notes
• BT_UART Pinmux
  • Introduction
  • BT_UART and UART3 works alone
  • BT_UART communicates with UART3
• SPI Flash Controller
  • Introduction
  • Functional Description
  • Registers
  • Flash Pinmux
  • Timing Critical
• True Random Number Generator (TRNG)
  • Introduction
  • Features
  • Functional Description
  • Registers
• Thermal Meter
  • Introduction
  • Features
  • Functional Description
  • Power-on Flow
  • Registers Access Control
  • Registers
• SDIO Host
  • Introduction
  • Architecture
  • Card Reader Control Flow
  • Access to Secure Digital Card & SDIO & Multi-media Card
  • Card Interface Signals
  • Registers
  • Application Specification
• Cap-Touch controller