Edwards-curve Digital Signature Algorithm (EdDSA)
Overall Description
Application Scenario
The Edwards-curve Digital Signature Algorithm (EdDSA) is a variant of Schnorr’s signature system with (possibly twisted) Edwards curves. The hardware EdDSA engine on the chip platform accelerates applications that need EdDSA signature verification or some EdDSA basic core functions. Hardware EdDSA engine executing these functions can not only reduce software overhead but also save CPU and memory resources. The processing of it is faster than software.
The advantages with EdDSA are as follows:
EdDSA provides high performance on a variety of platforms.SW signature verification run on Ameba_pro 300MHz msglen = 1024 bytes cost: 9.5ms; HW signature verification run simulation cost 3.5 ~ 4ms.
The use of a unique random number for each signature is not required.
It is more resilient to side-channel attacks.
EdDSA uses small public keys (32 or 57 bytes) and signatures (64 or 114 bytes) for Ed25519. Using 32 bytes (256 bits) public keys to verify 64 bytes signatures.
The formulas are “complete”, i.e., they are valid for all points on the curve, with no exceptions. This obviates the need for EdDSA to perform expensive point validation on untrusted public values.
EdDSA provides collision resilience, meaning that hash-function collisions do not break this system (only holds for PureEdDSA).
Programmers majorly use this engine to do signature verification on the chip platform for trusted boot and update. For trusted boot and trusted firmware update process, a minimum key size of EdDSA public key requirement is 256 bits (32 bytes) (ARM PSA suggestion).
Features
Realtek EdDSA engine provides basic EdDSA core functions and signature verification:
Signature verification
SB = rB + H(R,A,M)aB = R + H(R,A,M)A
Point operation
Scalar multiplication point
Point add
Point subtraction
Point decoding
Modular operation
Add module
Sub module
Div module
Multi module
Hash module 1
Hash module 2
Architecture
There are 2 main parts inside the EdDSA architecture. A simplified block diagram of the component is illustrated in the following figure.
Functional Description
Overview
EdDSA has seven parameters, an integer b≥10; a cryptographic hash function H producing 2b-bit output; a prime power q congruent to 1 modulo 4; a (b - 1)-bit encoding of elements of the Fq; a non-square element d of Fq; an L prime between and satisfying an extra constraint described below; and an element B≠(0, 1) of the set.
The condition that d is not a square implies that d {0,-1}, so this set E forms a group with neutral element 0 = (0, 1) under the twisted Edwards addition law.
The neutral element in the group is (0, 1). The inverse of a point (x1, y1) on E is (−x1, y1). Choice of curve for EdDSA is a twisted Edwards curve birationally equivalent to the curve Curve25519 from. We use the name Ed25519 for EdDSA with this particular choice of the curve.
Specially, Ed25519-SHA-512 is EdDSA with the following parameters: b = 256; H is SHA-512; q is the prime 2^255−19; the 255-bit encoding of F2^255−19 is the usual little-endian encoding of {0, 1, …., 2255-20}; L is the prime 2^252+27742317777372353535851937790883648493; d = −121665/121666 2 ∈ Fq; and B is the unique point (x,4/5) ∈ E for which x is positive.
Parameter |
Value |
|---|---|
p |
2^255 −19 |
b |
256 |
H(x) |
SHA−512 |
D |
−121665/121666= 37095705934669439343138083508754565189542113879843219016388785533085940283555 |
a |
−1 |
B |
(15112221349535400772501151409588531511454012693041857206046113283949847762202, 46316835694926478169428394003475163141307993866256225615783033603165251855960) |
L |
2^252+27742317777372353535851937790883648493 |
ED25519 Modular Arithmetic
Modular Inverse
For advice on how to implement arithmetic modulo p = 2^255 – 19 efficiently and securely, see Curve25519. For inversion modulo p, it is recommended to use the identity x^-1 = x^(p-2) (mod p). Inverting zero should never happen, as it would require invalid input, which would have been detected before, or would be a calculation error.
For point decoding or “decompression”, square roots modulo p are needed. They can be computed using the Tonelli-Shanks algorithm or the special case for p = 5 (mod 8). To find a square root of a, first compute the candidate root x = a^((p+3)/8) (mod p). Then there are three cases:
x^2 = a (mod p). Then x is a square root.
x^2 = -a (mod p). Then 2^((p-1)/4) * x is a square root. a is not a square modulo p.
Encoding
All values are coded as octet strings, and integers are coded using little-endian convention, i.e., a 32-octet string h h[0],…h[31] represents the integer h[0] + 2^8 * h[1] + … + 2^248 * h[31].
A curve point (x, y), with coordinates in the range 0 <= x, y < p, is coded as follows. First, encode the y-coordinate as a little-endian string of 32 octets. The most significant bit of the final octet is always zero. To form the encoding of the point, copy the least significant bit of the x-coordinate to the most significant bit of the final octet.
Decoding
Decoding a point, given as a 32-octet string, is a little more complicated.
Interpret the string as an integer in the little-endian representation. Bit[255] of this number is the least significant bit of the x-coordinate and denotes this value x_0. They-coordinate is recovered simply by clearing this bit. If the resulting value is >= p, decoding fails.
To recover the x-coordinate, the curve equation implies x^2 = (y^2 - 1) / (d y^2 + 1) (mod p). The denominator is always non-zero mod p. Let u = y^2 - 1 and v = d y^2 + 1. To compute the square root of (u/v), the first step is to compute the candidate root x = (u/v)^((p+3)/8). This can be done with the following trick, using a single modular powering for both the inversion of v and the square root.
Again, there are three cases:
If v x^2 = u (mod p), x is a square root.
If v x^2 = -u (mod p), set x ← x * 2^((p-1)/4), which is a square root.
Otherwise, no square root exists for modulo p, and decoding fails.
Use the x_0 bit to select the right square root. If x = 0, and x_0 = 1, decoding fails. Otherwise, if x_0 != x mod 2, set x ← p − x. Return the decoded point (x, y).
EdDSA decoding flow
EdDSA Signature Verification
Variation of an alleged signature on a message M under a public key works as follows. The verifier parses the key as A for some A ∈ E, and parses the alleged signature as (R, S) for some R ∈ E and S ∈ {0,1……L-1}. To see that signatures pass verification, simply multiply B by the equationS = (r + H(R,A,M)a) mod L, and use the fact that LB = 0, to see that
Formula: SB = R + H(R, A, M)A
Formula: 8SB = 8R + 8H(R, A, M)A
Points A: public key
Points R: signature first 32bytes [0:31]
M: message
S: signature last 32bytes[32:63]
B: the Ed25519 base point (x, 4/5)
The verifier computes H(R, A, M) and then checks the group equation 8SB =8R+8H(R, A, M)A in E. The verifier rejects the alleged signature if the parsing fails or if the group equation does not hold. It is sufficient, but not required, to instead check R + H(R, A, M)A.
EdDSA signature verification mechanism
Registers
The system programmer may access any of the EdDSA engine relative control and status register via CPU. These registers control EdDSA core function operations including engine function enable/reset, set engine mode, set engine input data, get engine output, enable/mask/check interrupt.
NA.
NA.
NA.
NA.
Base Address: 0x400EC000
Name |
Address offset |
Access |
Description |
|---|---|---|---|
000h |
R/W |
This register is used to set EdDSA engine clock enable and reset. |
|
008h |
R/W |
This register allows the programmer can check and configure EdDSA engine interrupt status. |
|
00Ch |
R/W |
This register is used to set or check EdDSA engine control status. |
|
010h |
R/W |
||
014h |
R/W |
||
018h |
R/W |
||
01Ch |
R/W |
||
020h |
R/W |
||
024h |
R/W |
||
028h |
R/W |
||
02Ch |
R/W |
||
030h |
R/W |
||
034h |
R/W |
||
038h |
R/W |
||
03Ch |
R/W |
||
040h |
R/W |
||
044h |
R/W |
||
048h |
R/W |
||
04Ch |
R/W |
||
050h |
R/W |
||
054h |
R/W |
||
058h |
R/W |
||
05Ch |
R/W |
||
060h |
R/W |
||
064h |
R/W |
||
068h |
R/W |
||
06Ch |
R/W |
||
070h |
R/W |
||
074h |
R/W |
||
078h |
R/W |
||
07Ch |
R/W |
||
080h |
R/W |
||
084h |
R/W |
||
088h |
R/W |
||
08Ch |
R/W |
||
090h |
R/W |
||
094h |
R/W |
||
098h |
R/W |
||
09Ch |
R/W |
||
0A0h |
R/W |
||
0A4h |
R/W |
||
0A8h |
R/W |
||
0ACh |
R/W |
||
0B0h |
R/W |
||
0B4h |
R/W |
||
0B8h |
R/W |
||
0BCh |
R/W |
||
0C0h |
R/W |
||
0C4h |
R/W |
||
0C8h |
R/W |
||
0CCh |
R/W |
||
0D0h |
R/W |
||
0D4h |
R/W |
||
0D8h |
R/W |
||
0DCh |
R/W |
||
0E0h |
R/W |
||
0E4h |
R/W |
||
0E8h |
R/W |
||
0ECh |
R/W |
||
0F0h |
R |
||
0F4h |
R |
||
0F8h |
R |
||
0FCh |
R |
||
100h |
R |
||
104h |
R |
||
108h |
R |
||
10Ch |
R |
||
200h |
R |
This register is used to debug EdDSA engine. |
REG_ENG_INITR
Name : EdDSA Engine Initial Setting Register
Size : 32
Address offset : 000h
Read/write access : R/W
This register is used to set EdDSA engine clock enable and reset.
Bit |
Symbol |
Access |
Reset |
Description |
|---|---|---|---|---|
31:9 |
RSVD |
R |
- |
Reserved |
8 |
ENG_CLK_ENABLE |
R/W |
0 |
EdDSA engine clock enable signal. |
7:1 |
RSVD |
R |
- |
Reserved |
0 |
ENG_RST |
R/W |
0 |
EdDSA engine synchronization reset. |
REG_ENG_CONF_INTR
Name : EdDSA Engine Configure Interrupt Register
Size : 32
Address offset : 008h
Read/write access : R/W
This register allows the programmer can check and configure EdDSA engine interrupt status.
Bit |
Symbol |
Access |
Reset |
Description |
|---|---|---|---|---|
31:13 |
RSVD |
R |
- |
Reserved |
12 |
ENG_DECODE_FAIL |
R/W |
0 |
Engine decode fail interrupt. Put high to clear fail interru pt. |
11 |
MODE3_FINISH |
R/W |
0 |
Engine mode3 interrupt. Put high to clear mode3 interrupt. |
10 |
MODE2_FINISH |
R/W |
0 |
Engine mode2 interrupt. Put high to clear mode2 interrupt. |
9 |
MODE1_FINISH |
R/W |
0 |
Engine mode1 interrupt. Put high to clear mode1 interrupt. |
8 |
MODE0_FINISH |
R/W |
0 |
Engine mode0 interrupt. Put high to clear mode0 interrupt. |
7:5 |
RSVD |
R |
- |
Reserved |
4 |
ENG_IDLE |
R/W |
0 |
When engine is busy, this bit will be put high. |
3 |
RSVD |
R |
- |
Reserved |
2 |
HASH_OK |
R/W |
0 |
When Hash digest input value is ready, put hask_ok to high. Only use this bit in some auto-flow setting. When programer set this bit to 1’b1, it means that hash digest input value is ready, engine can contiune processing next auto-flow ste p. |
1 |
RSVD |
R |
- |
Reserved |
0 |
ENG_START |
R/W |
0 |
Start for EdDSA function. It’s almost for all EdDSA function , except some auto-flow settings. When programer set this b it to 1’b1, it means that input values of the engine mode ar e ready, so engine can process the mode. Usually it won’t be set with HASH_OK. |
REG_ENG_CTRLR
Name : EdDSA Engine Control Register
Size : 32
Address offset : 00Ch
Read/write access : R/W
This register is used to set or check EdDSA engine control status.
Bit |
Symbol |
Access |
Reset |
Description |
|---|---|---|---|---|
31 |
YO2_WORD_SWAP |
R/W |
0 |
Byte swap
Word swap
|
30 |
YO2_BYTE_SWAP |
R/W |
0 |
Merged |
29 |
XO2_WORD_SWAP |
R/W |
0 |
Merged |
28 |
XO2_BYTE_SWAP |
R/W |
0 |
Merged |
27 |
YO1_WORD_SWAP |
R/W |
0 |
Merged |
26 |
YO1_BYTE_SWAP |
R/W |
0 |
Merged |
25 |
XO1_WORD_SWAP |
R/W |
0 |
Merged |
24 |
XO1_BYTE_SWAP |
R/W |
0 |
Merged |
23 |
Y2_WORD_SWAP |
R/W |
0 |
Merged |
22 |
Y2_BYTE_SWAP |
R/W |
0 |
Merged |
21 |
X2_WORD_SWAP |
R/W |
0 |
Merged |
20 |
X2_BYTE_SWAP |
R/W |
0 |
Merged |
19 |
Y1_WORD_SWAP |
R/W |
0 |
Merged |
18 |
Y1_BYTE_SWAP |
R/W |
0 |
Merged |
17 |
X1_WORD_SWAP |
R/W |
0 |
Merged |
16 |
X1_BYTE_SWAP |
R/W |
0 |
Merged |
15 |
MODE3_F_MASK |
R/W |
0 |
Mask mode3 finish interrupt |
14 |
MODE2_F_MASK |
R/W |
0 |
Mask mode2 finish interrupt |
13 |
MODE1_F_MASK |
R/W |
0 |
Mask mode1 finish interrupt |
12 |
MODE0_F_MASK |
R/W |
0 |
Mask mode0 finish interrupt |
11 |
ENG_DECODE_FAIL_MASK |
R/W |
0 |
Mask decoding fail interrupt |
10 |
RECOVER_X_EN |
R/W |
0 |
Reocver (decode) point enable contrl. When this bit is set t o 1’b1, it means that enable decoding mode. |
9 |
SUB_POINT |
R/W |
0 |
Point subtraction enable control in mode2. |
8 |
MOD_Q |
R/W |
0 |
Select modular1 or 2 for Hash mod. Modular1: hash[511:0] modular (2^255 - 19) Modular2: hash[511:0] modular (2^252+ 27742317777372353535851937790883648493) |
7 |
H512_EN |
R/W |
0 |
SHA512 hash enable control. |
6 |
BYP_H512 |
R/W |
0 |
SHA512 hash bypass mode control. |
5 |
AUTO_SP |
R/W |
0 |
Auto-flow step enable control. Basically, it is used to ope n one pass flow in mode0/mode1 flow. It won’t be set in mode2/mode3. |
4 |
AP_EN |
R/W |
0 |
Add point enable control. It is only used in mode3. |
3:2 |
FUN_SEL |
R/W |
0 |
EdDSA Basic Function selection
It depends on ECOVER_X_EN and AP_EN.
It depends on H512_EN and MOD_Q. |
1:0 |
MOD_SEL |
R/W |
0 |
EdDSA mode selection
|
REG_ENG_X1_Px
Name : EdDSA Engine X1 Point Register x
Size : 32
Address offset : 010h + 04h * x (x=0, 1, 2, 3, 4, 5, 6, 7)
Read/write access : R/W
The programmer can set X axis value of one point which is on the curve into eight 4bytes registers (
8x32bits = 256bits). These registers are usually considered to the input parameters.
Bit |
Symbol |
Access |
Reset |
Description |
|---|---|---|---|---|
31:0 |
ENG_X1_Px |
R/W |
0 |
X1 value[31:0] of an input point. |
REG_ENG_Y1_Px
Name : EdDSA Engine Y1 Point Register x
Size : 32
Address offset : 030h + 04h * x (x=0, 1, 2, 3, 4, 5, 6, 7)
Read/write access : R/W
The programmer can set Y axis value of one point which is on the curve into eight 4bytes registers (
8x32bits = 256bits). These registers are usually considered to the input parameters.
Bit |
Symbol |
Access |
Reset |
Description |
|---|---|---|---|---|
31:0 |
ENG_Y1_Px |
R/W |
0 |
Y1 value[31:0] of an input point. |
REG_ENG_X2_Px
Name : EdDSA Engine X2 Point Register x
Size : 32
Address offset : 050h + 04h * x (x=0, 1, 2, 3, 4, 5, 6, 7)
Read/write access : R/W
The programmer can set X axis value of one point which is on the curve into eight 4bytes registers (
8x32bits = 256bits). These registers are usually considered to the input parameters.
Bit |
Symbol |
Access |
Reset |
Description |
|---|---|---|---|---|
31:0 |
ENG_X2_Px |
R/W |
0 |
X2 value[31:0] of an input point. |
REG_ENG_Y2_Px
Name : EdDSA Engine Y2 Point Register x
Size : 32
Address offset : 070h + 04h * x (x=0, 1, 2, 3, 4, 5, 6, 7)
Read/write access : R/W
The programmer can set Y axis value of one point which is on the curve into eight 4bytes registers(8
x32bits = 256bits). These registers are usually considered to the input parameters.
Bit |
Symbol |
Access |
Reset |
Description |
|---|---|---|---|---|
31:0 |
ENG_Y2_Px |
R/W |
0 |
Y2 value[31:0] of an input point. |
REG_ENG_XO1_Px
Name : EdDSA Engine X1 Point Register x
Size : 32
Address offset : 090h + 04h * x (x=0, 1, 2, 3, 4, 5, 6, 7)
Read/write access : R/W
The programmer can read X axis value of one point which is on the curve from eight 4bytes registers
(8x32bits = 256bits). These registers are usually considered to the output values.
Bit |
Symbol |
Access |
Reset |
Description |
|---|---|---|---|---|
31:0 |
ENG_XO1_Px |
R/W |
0 |
X1 value[31:0] of an output point. |
REG_ENG_YO1_Px
Name : EdDSA Engine Y1 Point Register x
Size : 32
Address offset : 0B0h + 04h * x (x=0, 1, 2, 3, 4, 5, 6, 7)
Read/write access : R/W
The programmer can read Y axis value of one point which is on the curve from eight 4bytes registers
(8x32bits = 256bits). These registers are usually considered to the output values.
Bit |
Symbol |
Access |
Reset |
Description |
|---|---|---|---|---|
31:0 |
ENG_YO1_Px |
R/W |
0 |
Y1 value[31:0] of an input point. |
REG_ENG_XO2_Px
Name : EdDSA Engine X2 Point Register x
Size : 32
Address offset : 0D0h + 04h * x (x=0, 1, 2, 3, 4, 5, 6, 7)
Read/write access : R/W
The programmer can read X axis value of one point which is on the curve from eight 4bytes registers
(8x32bits = 256bits). These registers are usually considered to the output values.
Bit |
Symbol |
Access |
Reset |
Description |
|---|---|---|---|---|
31:0 |
ENG_XO2_Px |
R/W |
0 |
X2 value[31:0] of an output point. |
REG_ENG_YO2_Px
Name : EdDSA Engine Y2 Point Register x
Size : 32
Address offset : 0F0h + 04h * x (x=0, 1, 2, 3, 4, 5, 6, 7)
Read/write access : R
The programmer can read Y axis value of one point which is on the curve from eight 4bytes registers
(8x32bits = 256bits). These registers are usually considered to the output values.
Bit |
Symbol |
Access |
Reset |
Description |
|---|---|---|---|---|
31:0 |
ENG_YO2_Px |
R |
0 |
Y2 value[31:0] of an output point. |
REG_ENG_DBG_OUTPUTR
Name : EdDSA Engine Debug Output Register
Size : 32
Address offset : 200h
Read/write access : R
This register is used to debug EdDSA engine.
Bit |
Symbol |
Access |
Reset |
Description |
|---|---|---|---|---|
31:28 |
DBG_DECOMP_CURR_STATE |
R |
0 |
FSM signal in decoding module |
27 |
DBG_REG_ENG_RST |
R |
0 |
Reset signal in top module |
26 |
DBG_ENG_FINISH |
R |
0 |
FSM signal in top module |
25:22 |
DBG_FUNC_CURR_STATE |
R |
0 |
Function FSM signal in top module |
21:18 |
DBG_CURR_STATE |
R |
0 |
FSM signal in top module |
17 |
DBG_ADD_1_FINISH |
R |
0 |
Finish signal in add_1 module |
16 |
DBG_ADD_2_FINISH |
R |
0 |
Finish signal in add_2 module |
15:12 |
DBG_ADD_1_CURR_STATE |
R |
0 |
FSM signal in add_1module |
11 |
DBG_ADD_1_MUL_1_FINISH |
R |
0 |
Mul and inv module finish signal in add_1 module |
10 |
DBG_ADD_1_MUL_2_FINISH |
R |
0 |
Merged |
9 |
DBG_ADD_1_INV_1_FINISH |
R |
0 |
Merged |
8 |
DBG_ADD_1_INV_2_FINISH |
R |
0 |
Merged |
7:4 |
DBG_ADD_2_CURR_STATE |
R |
0 |
FSM signal in add_2 module |
3 |
DBG_ADD_2_MUL_1_FINISH |
R |
0 |
Mul and inv module finish signal in add_2 module |
2 |
DBG_ADD_2_MUL_2_FINISH |
R |
0 |
Merged |
1 |
DBG_ADD_2_INV_1_FINISH |
R |
0 |
Merged |
0 |
DBG_ADD_2_INV_2_FINISH |
R |
0 |
Merged |