System Tick (SysTick) Timer
The System Tick (SysTick) Timer is an integral part of the CPU.
Features
A 24-bit decrementing, wrap-on-zero, clear-on-write counter
Dedicated exception vector
Clocked internally by the system clock
Secure and non-secure SysTick timers are functionally identical. Each has its own registers and its access depending on the current security state.
Functional Description
SysTick timer block diagram is illustrated below.
The SysTick timer is a 24-bit timer that counts down to zero and generates an interrupt.
When enabled, the counter counts down from the value in SYST_CVR. When it reaches zero, SYST_CVR is reloaded with the value held in SYST_RVR on the next clock edge.
Reading SYST_CVR returns the value of the counter at the time of the read access.
When the counter reaches zero, it sets SYST_CSR.COUNTFLAG to 1. Reading SYST_CSR.COUNTFLAG clears it to 0.
A write to SYST_CVR clears both SYST_CVR and SYST_CSR.COUNTFLAG to 0. SYST_CVR is then reloaded with the value held in SYST_RVR on the next clock edge.
Since the SysTick timer is a part of the CPU, it facilitates porting of software by providing a standard timer that is available on ARM Cortex-M based devices. The SysTick timer can be used for:
a RTOS tick timer which fires at a programmable rate (for example 1000Hz) and invokes a SysTick routine.
a high-speed alarm timer using the core clock.
a simple counter. Software can use this to measure time completed and used.
an internal clock source control based on missing/meeting durations. The COUNTFLAG bit in the SYST_CSR register can be used to determine if an action completed within a set duration, as part of a dynamic clock management control loop.
Refer to the appropriate ARM Cortex User Guide for more details.
Registers
The SysTick timer registers are located on the private peripheral bus of each CPU. The physical base address is 0xE000_E000.
Name |
Offset |
Access |
Description |
|---|---|---|---|
0x010 |
R/W |
System Timer Control and Status Register |
|
0x014 |
R/W |
System Timer Reload Value Register |
|
0x018 |
R/W |
System Timer Current Value Register |
|
0x01C |
RO |
System Timer Calibration Value register |
SYST_CSR
Name: System Timer Control and Status Register
Size: 32 bits
Address offset: 0x010
Read/write access: read/write
This register contains control information for the SysTick timer and provides a status flag. It is a part of the CPU, and determines the clock source for the SysTick timer.
Bit |
Symbol |
Access |
Reset |
Description |
|---|---|---|---|---|
[31:17] |
RSVD |
- |
- |
Reserved. Read value is undefined, only zero should be written. |
[16] |
COUNTFLAG |
R/W |
0 |
Returns 1 if the SysTick timer counted to 0 since the last read of this register. |
[15:3] |
RSVD |
- |
- |
Reserved. Read value is undefined, only zero should be written. |
[2] |
CLKSOURCE |
R/W |
0 |
SysTick clock source selection.
Note When the SysTick clock divider is selected as the clock source, the CPU clock must be at least 2.5 times faster than the divider output. |
[1] |
TICKINT |
R/W |
0 |
SysTick interrupt enable.
|
[0] |
ENABLE |
R/W |
0 |
SysTick counter enable.
|
SYST_RVR
Name: System Timer Reload Value Register
Size: 32 bits
Address offset: 0x014
Read/write access: read/write
This register is set to the value which is loaded into the SysTick timer, whenever it counts down to zero. This register is loaded by software as part of timer initialization. The SYST_CALIB register may be read and used as the value for SYST_RVR register if the CPU is running at the frequency intended for use with the SYST_CALIB value.
Bit |
Symbol |
Access |
Reset |
Description |
|---|---|---|---|---|
[31:24] |
RSVD |
- |
- |
Reserved. Read value is undefined, only zero should be written. |
[23:0] |
RELOAD |
R/W |
0 |
The value which is loaded into the SysTick counter when it counts down to 0. |
SYST_CVR
Name: System Timer Current Value Register
Size: 32 bits
Address offset: 0x018
Read/write access: read/write
This register returns the current count from the SysTick counter when read by software.
Bit |
Symbol |
Access |
Reset |
Description |
|---|---|---|---|---|
[31:24] |
RSVD |
- |
- |
Reserved. Read value is undefined, only zero should be written. |
[23:0] |
CURRENT |
R/W |
0 |
Reading this filed gets the current value of the SysTick counter. Writing any value clears the SysTick timer counter for the selected Security state to zero. |
SYST_CALIB
Name: System Timer Calibration Value Register
Size: 32 bits
Address offset: 0x01C
Read/write access: read-only
The value of this register is provided by the value of the SYST_CALIB register in the system configuration (SYSCON) block.
Bit |
Symbol |
Access |
Reset |
Description |
|---|---|---|---|---|
[31] |
NOREF |
R |
0 |
Indicates whether an external reference clock is available. This bit is loaded from the SYST_CALIB register in SYSCON.
|
[30] |
SKEW |
R |
0 |
Indicates whether the TENMS value generates a precise 10-millisecond time, or an 0 approximation. This bit is loaded from the SYST_CALIB register in SYSCON.
|
[29:24] |
RSVD |
- |
- |
Reserved. Read value is undefined, only zero should be written. |
[23:0] |
TENMS |
R |
0 |
This field is loaded 0 from the SYST_CALIB register in SYSCON, and always RAZ/WI (read as zero, write ignored). |
SysTick Timer Configuration
The SysTick timer provides a fixed 1 millisecond time interval for operating system or other system management software. The SysTick timer is clocked from the CPU clock (default is the system clock). In order to generate recurring interrupts at a specific interval, the SYST_RVR register must be initialized with the correct value for the desired interval.
Here is an example of 1ms interrupt interval clocked from the system clock. If the system clock is 200MHz, then the SysTick configuration is:
Calculate and Set the SYST_RVR = (system clock(HZ) * interrupt interval(s)) ─ 1 = 200000000/1000 ─ 1 = 0x30d3f.
Write SYST_CVR to any value to clear SYST_CVR to zero and clear SYST_CSR.COUNTFLAG.
Program the SYST_CSR is 0x7 to select system clock, enable SysTick interrupt and enable count.