HiFi DSP SDK User Guide

• DSP SDK Download
  • Overview
  • Download DSP SDK
• DSP SDK Architecture
  • SoC System Architecture Introduction
  • DSP SDK Composition Structure
  • Version Compatibility
  • Cadence Official Documentation
• DSP Environment Setup
  • MCU Development Environment Setup
  • DSP Development Environment Setup
• DSP Project Configuration
  • Overview
  • Basic Configuration
  • Advanced Configuration
  • Building Example Projects
• DSP Build and Flashing
  • Firmware Composition
  • Build Process
  • DSP Firmware Build
  • MCU Firmware Compilation and Flashing
  • Compilation and Debugging Files
  • Common Issues
• DSP Debugging
  • Preparation
  • Connect DSP to J-Link
  • Debugging Methods
  • Debugging Tips
  • xt-ocd Debugging Issues
• DSP ISS Simulation
  • Build Project
  • Configure and Start Simulation
  • CMD Simulation
  • Profile and FreeRTOS Task Issues
  • Reference Documentation
• DSP ABI Calling Convention
  • Calling Convention
  • Switching Between Call0 ABI and Window ABI
  • Configuring Library Paths for Different ABIs
• DSP Memory
  • DSP Memory Architecture
  • DSP Memory Access Speed
  • DSP Memory Access Methods
  • iDMA Double Buffer Data Transfer Example
  • DSP Memory Layout
• DSP Libraries
  • HiFi 5 Signal Processing Library
  • HiFi 5 Neural Network Library
• DSP Important Notes
  • Printf
  • DTCM Address Limitations
  • iDMA
  • FreeRTOS SyStick
  • Cache
  • MPU Entry
  • Crash Dump Analysis