Pin Multiplexing (PINMUX)

Introduction

In modern SoC designs, the number of peripherals continues to grow while the number of physical pins is constrained by package cost and size. To maximize system functionality within limited pin resources, the chip integrates a PINMUX (Pin Multiplexing) feature: through software configuration, a single physical pin can be flexibly assigned to different peripheral modules.

Therefore, before using a peripheral (such as UART, SPI, I2C, etc.), users must first map the peripheral’s signals to the designated physical pins via PINMUX, establishing a connection path between the peripheral and the pins.

Functional Description

The core of PINMUX is to equip each I/O port with an independent multiplexer. This multiplexer is responsible for selecting among multiple peripheral signals, ensuring that only one peripheral signal occupies the pin at any given time, thereby avoiding signal conflicts caused by multiple peripherals contending for the same pin.

The selection behavior of the multiplexer is controlled by a function ID:

• The function ID is the configuration value written to the pin multiplexing register, used to specify the peripheral signal currently connected to the pin.

• Each I/O port has a corresponding function ID field. Writing different values to this field connects the corresponding peripheral signal (e.g., UART1_RXD, SPI0_CLK, GPIO, etc.) to the pin.

Based on the range of function ID values, pin functions can be divided into two categories: the dedicated pin function group and the full-matrix pin function group.

For the specific values of function IDs and their corresponding signal mappings, refer to the Pinmux Table.

Note

When using special pins such as TrapPin, WakePin, and SWDPin, be sure to read the relevant notes in the hardware design guide beforehand to avoid functional anomalies caused by improper configuration.

Dedicated Pin Function Group

In the dedicated pin function group, the fixed signals of specific peripheral modules can only be connected to their corresponding dedicated pins. The number of configurable functions is relatively limited, but this dedicated design allows each IP module to perform optimally and meet the signal quality and speed requirements of peripherals.

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The function ID range for the dedicated pin function group is 0~{{IC_PARAM_FUNCID_DEDICATE_END}}.

Taking PB30 as an example, all peripheral signals shown in the figure below can be connected to this pin through pin mux. If the function ID is configured as 16, the TIM9_TRIG signal of TIM9 will be directly connected to this pin through pin mux.

Note

• Dedicated pins are typically organized by function group, where each function group contains a set of related pins. For optimal performance, pins should be selected within the same function group to avoid mixing pins across different groups.

• For detailed information on function group divisions, refer to the Group-related descriptions in the Pinmux Table annotations.

Full-Matrix Pin Function Group

In the full-matrix pin function group, signals from almost all peripheral modules within the group can be flexibly mapped to any pin by configuring the function ID. This design provides greater configuration flexibility and is suitable for application scenarios where pin resources are constrained and flexible allocation is required.

Note

• A small number of I/O ports do not support full-matrix functions; for details, refer to the Pinmux Table.

• The flexibility of the full-matrix pin function group comes at a certain performance cost: some IP modules may have a lower maximum transfer rate when using full-matrix pins compared to the theoretical maximum when using dedicated pins. Users should make their selection based on actual requirements.

• Additionally, a small number of pins in the full-matrix pin function group may not support certain peripherals; these are marked with 0 in the Pinmux Table.

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The Function ID range for the Full-Matrix Pin Function Group is {{IC_PARAM_FUNCID_FULL_MATRIX_START}}~{{IC_PARAM_FUNCID_FULL_MATRIX_END}}.

Taking PB30 as an example:

• When the Function ID of PB30 is configured to 19, PB30 can be connected to the UART0_TXD signal of UART0;

• When the Function ID of PB30 is configured to 20, it can be connected to the UART0_RXD signal of UART0.

• By analogy, PB30 can be configured to any Function ID in the Full-Matrix Pin Function Group.