Pin Multiplexing (PINMUX)

Introduction

In modern SoC designs, the number of peripherals continues to grow while physical pin count is constrained by package cost and size. To maximize system functionality within limited pin resources, the chip integrates a PINMUX (Pin Multiplexing) feature: through software configuration, a single physical pin can be flexibly assigned to different peripheral modules.

Therefore, before using a peripheral (such as UART, SPI, I2C, etc.), the user must first use PINMUX to map the peripheral’s signal to a designated physical pin, establishing the connection path between the peripheral and the pin.

Functional Description

The core of PINMUX is to equip each I/O pin with an independent multiplexer. The multiplexer selects among multiple peripheral signals, ensuring that only one peripheral signal occupies the pin at any given time, thereby avoiding signal conflicts caused by multiple peripherals contending for the same pin.

The multiplexer’s selection behavior is controlled by the Function ID:

• The Function ID is the configuration value written to the pin multiplexing register, used to specify which peripheral signal the pin is currently connected to.

• Each I/O pin corresponds to one Function ID field. Writing different values to this field switches the pin to the corresponding peripheral signal (e.g., UART1_RXD, SPI0_CLK, GPIO, etc.).

Based on the value range of the Function ID, pin functions can be divided into two categories:

Function Group	Function ID Range	Characteristics
Dedicated Pin Function Group	Lower values	Connected to fixed signals, optimal performance
Full-Matrix Pin Function Group	Higher values	Flexible connections, high degree of freedom

Note

For the specific values of Function IDs and their corresponding signal mappings, refer to the Pin Multiplexing Table.

Warning

When using special pins such as TrapPin, WakePin, SWDPin, and SpecialPin, be sure to read the relevant precautions in the Hardware Design Guide first to avoid functional abnormalities caused by improper configuration.

Dedicated Pin Function Group

In the Dedicated Pin Function Group, each pin can only be connected to fixed signals of specific peripheral modules. The number of configurable functions is relatively limited, but this dedicated design can fully leverage the performance of each IP module to meet the signal quality and data rate performance requirements of the peripheral.

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RTL8721Dx:

The Function ID range for the Dedicated Pin Function Group is 0~{{IC_PARAM_FUNCID_DEDICATE_END}}.

Taking PB30 as an example, it can be connected to several peripheral signals as shown in the figure below. If its Function ID is configured to 16, the pin will be directly connected to the TIM9_TRIG signal of TIM9 via pin multiplexing.

Note

• Dedicated pins are typically organized by function group, where each function group contains a set of related pins. For optimal performance, it is recommended to select pins within the same function group and avoid mixing pins across different function groups.

• For detailed information on function group divisions, refer to the Group-related descriptions in the annotations of the Pin Multiplexing Table.

Full-Matrix Pin Function Group

In the Full-Matrix Pin Function Group, each pin can be flexibly mapped to almost all signals of all peripheral modules within the function group by configuring different Function IDs. This design provides greater configuration flexibility and is suitable for application scenarios where pin resources are tight and flexible allocation is needed.

Note

• A small number of IOs do not support the full-matrix function. For details, refer to the Pin Multiplexing Table.

• The flexibility of the Full-Matrix Pin Function Group comes at a certain performance cost: when some IP modules use full-matrix pins, the maximum transfer rate may be lower than the theoretical limit achievable with dedicated pins. Users should weigh their choices based on actual requirements.

• In addition, a few pins in the Full-Matrix Pin Function Group may not support specific peripherals, which are marked with 0 in the Pin Multiplexing Table.

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RTL8721Dx:

The Function ID range for the Full-Matrix Pin Function Group is {{IC_PARAM_FUNCID_FULL_MATRIX_START}}~{{IC_PARAM_FUNCID_FULL_MATRIX_END}}.

Taking PB30 as an example:

• When the Function ID of PB30 is configured to 19, PB30 can be connected to the UART0_TXD signal of UART0;

• When the Function ID of PB30 is configured to 20, it can be connected to the UART0_RXD signal of UART0.

• By analogy, PB30 can be configured to any Function ID in the Full-Matrix Pin Function Group.