USB Introduction
Overview
Supported ICs[ RTL8721Dx ][ RTL8721F ]
USB (Universal Serial Bus) is a standard serial communication interface designed to interconnect host controllers and peripheral devices.
The complete USB specification suite, including electrical, mechanical, and protocol layer documentation, is accessible at http://www.usb.org/developers.
Note
Due to the incomplete official USB protocol stack of Zephyr, which only supports device mode. Therefore, we choose not to use the official source code, but instead provide the Realtek USB stack. This chapter briefly introduces the Realtek USB stack, and how to compile and run application examples.
Features
Supports USB2.0 high-speed (480 Mbps) and full-speed (12 Mbps) modes
Supports the following USB host solutions:
CDC ACM: Implement bidirectional transparent data transmission function, suitable for application scenarios such as serial communication and data collection
UAC: Supports audio playback function and can be connected to USB audio devices for audio output
HID+UAC composite host: supports both human-computer interaction and audio playback, achieving integrated control of button control and audio playback
Vendor: A customized solution that breaks through the limitations of standard host classes and meets the personalized needs of special application scenarios
Support the following USB device solutions:
CDC ACM: Supports bidirectional transparent data transmission and can be used as a virtual serial port
HID: Simulate standard HID peripherals such as USB keyboards and mice to achieve rich human-computer interaction functions
MSC: As a USB storage device, it realizes data storage and read-write functions
UAC: As a USB audio device, it supports audio playback function
CDC ACM+HID composite device: supports both transparent communication and interactive control simultaneously
CDC ACM+MSC composite equipment: supports both transparent communication and data storage simultaneously
CDC ACM+UAC composite device: supports both transparent communication and audio playback simultaneously
HID+UAC composite device: supports both interactive control and audio playback simultaneously
Vendor: Customized solutions that break through the limitations of standard equipment and meet the personalized needs of special application scenarios
Support full customization of descriptors in device mode
VID and PID
String descriptors
Endpoint mapping
Supports flexible device matching in host mode
Specify device matching strategy (such as matching VID/PID, or matching specific class protocols, etc.)
Automatically parse descriptors
Adaptive speed mode
Configurable device core driver parameters
Speed mode
Data FIFO depth (only for dedicated FIFO mode)
Core ISR/thread priority
Hardware Features
Supports device mode
Supports USB 2.0 full-speed (12 Mbps) mode
Supports DMA mode
Endpoint configurations:
EP0: INOUT (for Control transfer only)
EP1: IN
EP2: OUT
EP3: IN
EP4: OUT
EP5: INOUT
Note
One and only one periodic IN endpoint is supported.
Shared FIFO with following configurations:
Total FIFO depth: 768 DWORD
Shared receive FIFO: 472 DWORD (max)
Shared non-periodic transmit FIFO: 32 DWORD (max)
Dedicated periodic transmit FIFO: 256 DWORD (max)
Note
8 DWORD FIFO shall be reserved for DMA registers in DMA mode.
Supports host and device modes
Supports USB 2.0 high-speed (480 Mbps) and full-speed (12 Mbps) modes
Supports DMA mode
Endpoint configurations in device mode:
EP0: INOUT (for Control transfer only)
EP1: IN
EP2: INOUT
EP3: INOUT
EP4: IN
EP5: OUT
EP6: INOUT
EP7: OUT
Supports 12 channels/pipes in host mode
Shared FIFO with following configurations:
Total FIFO depth: 1024 DWORD
Host mode:
Shared receive FIFO: 1024 DWORD (max)
Shared non-periodic transmit FIFO: 1024 DWORD (max)
Shared periodic transmit FIFO: 1024 DWORD (max)
Device mode:
Shared RX FIFO: 1024 DWORD (max)
6 dedicated transmit FIFOs for device IN transfers, max depth of each Tx FIFO:
Tx FIFO 0: 32
Tx FIFO 1: 16
Tx FIFO 2: 256
Tx FIFO 3: 32
Tx FIFO 4: 256
Tx FIFO 5: 128
Note
12 DWORD FIFO shall be reserved for DMA registers in DMA mode.
Integrated UTMI+ PHY
External hub connection support in host mode
Automatic ping in host mode
Software Stack Overview
Software stack architecture
Where:
USB HAL driver: Implements SoC-specific hardware driver for power management and phy calibration, exposing unified HAL API to upper-layer core drivers.
USB device core drivers: Integrates USB IP-specific hardware driver, device controller driver, enumeration state machine and transfer scheduling algorithms, exposing unified core API for designers to develop classes and applications.
USB device class drivers: Delivers USB-IF class-compliant drivers via class-specific API, enabling rapid deployment of standard USB solutions.
USB device applications: Provides reference designs for USB solutions.
Zephyr USB API is consistent with FreeRTOS USB API. For details, see FreeRTOS USB API
File Organization
SDK/modules/hal/realtek
├── ameba/common/usb/source
│ ├── common
│ │ ├── usb_cdc_acm.h
│ │ ├── usb_ch9.h
│ │ ├── usb_msc.h
│ │ ├── usb_os.h
│ │ ├── usb_ringbuf.h
│ │ ├── usb_scsi.h
│ │ ├── usb_uac1.h
│ │ └── usb_uac2.h
│ │
│ └── device
│ ├── cdc_acm
│ ├── composite
│ ├── hid
│ ├── inic_dplus
│ ├── msc
│ ├── uac
│ ├── vendor
│ └── core
│ └── usbd.h
│
└── zephyr/blobs/amebadplus/lib
└── lib_usbd.a
SDK/modules/hal/realtek
├── ameba/common/usb/source
│ ├── common
│ │ ├── usb_cdc_acm.h
│ │ ├── usb_ch9.h
│ │ ├── usb_msc.h
│ │ ├── usb_os.h
│ │ ├── usb_ringbuf.h
│ │ ├── usb_scsi.h
│ │ ├── usb_uac1.h
│ │ └── usb_uac2.h
│ │
│ ├── device
│ │ ├── cdc_acm
│ │ ├── composite
│ │ ├── hid
│ │ ├── inic
│ │ ├── msc
│ │ ├── uac
│ │ ├── vendor
│ │ └── core
│ │ └── usbd.h
│ │
│ └── host
│ ├── cdc_acm
│ ├── composite
│ ├── uac
│ ├── vendor
│ └── core
│ └── usbh.h
│
└── zephyr/blobs/amebaG2/lib
├── lib_usbh.a
└── lib_usbd.a
USB Certification
Refer to the USB Certification chapter in FreeRTOS USB programming guide: USB Certification