Introduction

The Watchdog Timer (WDG) is a hardware timer primarily used to detect and recover from system anomalies caused by software faults. It contains an auto-decrementing counter that requires periodic “feeding” (resetting the counter). If the counter reaches zero, a system reset will be triggered. WDG can be divided into Independent Watchdog (IWDG) and System Watchdog (SWDG), where the System Watchdog is further categorized into secure and non-secure types. The WDG architecture diagram is as follows:

Features

  • Common Features

    • Once enabled, cannot be disabled.

    • Optional early interrupt function that generates an interrupt at a programmable time before watchdog timeout.

    • Each watchdog timer has independent boot reasons.

  • IWDG Specific Features

  • Powered by the AON domain’s power supply and clock source

  • Configurable operation in sleep mode

  • Can wake system from sleep mode via early interrupt

  • Automatically halted when KM4/KM0 is in debug mode

  • Timeout can only be decreased (not increased) after enabled

  • System Watchdog Specific Features

  • WDG0 halted when KM0 is in debug mode; WDG1 and WDG2 halted when KM4 is in debug mode

  • Halted in sleep mode with settings remaining unchanged

  • Window protection function and timeout become unmodifiable once enabled

Note

Both IWDG and System Watchdog support window function. However, since the AON 100kHz clock is uncalibrated, it is not recommended to enable the window function for IWDG.

Hardware Default Enable

Independent Watchdog (IWDG) is enabled by default in Efuse configuration, activated during every system startup with a 64-second timeout duration, and a software-implemented RTOS timer executes the watchdog refresh task every 500 ms.

Low-Power Modes

  • All watchdogs are disabled in deepsleep mode.

  • In sleep mode, the System Watchdog stops working while the Independent Watchdog (IWDG) can be configured to either continue operating or halt in sleep mode.

  • When the IWDG is configured to continue operating in sleep mode, it is recommended to enable the early interrupt to wake the system and execute the interrupt handler for watchdog refresh.

Reset Domains

All watchdog trigger global reset when counter reaches zero

Application Examples

The SDK provides two types of functional examples to help developers understand and use WDG:

  • mbed Examples

    • Path: {SDK}\component\example\peripheral\mbed\Watchdog\mbed_watchdog

    • Demonstrates watchdog control in the mbed environment.

  • raw Examples

    • Path: {SDK}\component\example\peripheral\raw\Watchdog\raw_watchdog

    • Demonstrates direct watchdog control without abstraction layers.

Brief description of raw example functionality:

  • raw_watchdog demonstrates watchdog configuration and control.

Note

Refer to the README.md file in the example directory for supported chips.

API Reference

For detailed API usage, refer to: {SDK}\component\soc\amebaxxxx\fwlib\include\ameba_wdg.h