ISP Series
Highlights
Core Architecture
Real-M500 @ 500MHz
Armv8-M architecture
Built-in NPU Engine 0.4TOPS computing power
ISP/Vedio
2K/FHD high resolution video
Security
Secure boot
Arm TrustZone
True random number generator (TRNG)
AES/SHA algorithms
ECDSA/EdDSA/RSA engine
Full or partial Flash encryption
JTAG/SWD debug port password protection
Wireless
Wi-Fi 4 Dual-Band
BLE 5.1
Antenna diversity
Ultra-Low Power
Booting up quickly in milliseconds, without missing any images.
Ultra-low power consumption in microampere standby mode,
suitable for battery-powered applications.
More
Audio codec
Image ISP H.264/H.265 video encoder
AI model conversion
yolov3/4/7-tiny
CNN Gray/RGB
Product Comparison
Part number |
Real-M500 |
NPU |
ISP/Video Processor |
On-chip SRAM |
TrustZone |
DDR |
Wi-Fi |
Bluetooth |
Operating voltage |
Operating temperature |
Package (mm) |
|---|---|---|---|---|---|---|---|---|---|---|---|
RTL8735BDM-VA4-CG |
500MHz |
Up to 2K/FHD |
512KB |
Y |
128MB (DDR2) |
Wi-Fi 4 (2.4GHz + 5GHz) |
BLE 5.1 |
3.135V ~ 3.465V |
-20°C ~ 85°C |
QFN128 (10 x 10) |
|
RTL8735BM-VA4-CG |
500MHz |
Up to 2K/FHD |
512KB |
Y |
128MB (DDR2) |
Wi-Fi 4 (2.4GHz) |
BLE 5.1 |
3.135V ~ 3.465V |
-20°C ~ 85°C |
QFN128 (10 x 10) |
|
RTL8735BDM-VA9-CG |
500MHz |
Up to 2K/FHD |
512KB |
Y |
256MB (DDR3) |
Wi-Fi 4 (2.4GHz + 5GHz) |
BLE 5.1 |
3.135V ~ 3.465V |
-20°C ~ 85°C |
QFN128 (10 x 10) |
Block Diagram
TBD
Core Architecture
Real-M500 CPU
Armv8M architecture
Up to 500MHz
32KB I-Cache, 32KB D-Cache
CNN AI Engine:
0.4TOPS@INT8/INT16 (NPU) computing power
Memory System
Embedded 64MB/128MB/256MB DDR2/DDR3 memory,
clock speed 533MHz
Internal 768KB ROM, clock speed 250MHz
Internal 512KB SRAM, clock speed 250MHz
Support SPI interface NOR Flash or NAND Flash
Peripheral Interfaces
Flexible design of GPIO configuration
Multiple communication interfaces, supporting up to:
4* UART, baud rate up to 4MHz, all interfaces can be
configured as log UART
4* I2C, max. clock 400Kbps
2* SPI, master clock up to 25Mbps/slave clock up to
31.25Mbps
12* PWM, configurable duration and duty cycle from
0 ~ 100%
ADC channels, 12-bit mode with max. 31.5KHz
59 programmable GPIOs
2 GDMA, up to 6 channels each
Support USB 2.0 Device/Host mode
Support SD Card (Version 1.0-3.0)/4-bit,
up to 2TB card capacity
Integrated Audio Codec：
One output, one input AMIC or 2 DMIC
Up to 96 kHz sampling frequency and 24-bit data width
Wireless Connectivity
Wi-Fi
Wi-Fi 802.11a/b/g/n 1x1 2.4GHz/5GHz
Supports antenna diversity
Bluetooth
Bluetooth Low Energy, BLE 5.1
Security Features
Supports Arm Trust-Zone
Supports Secure boot
True random number generator (TRNG)
Hardware encryption engine, supports AES and SHA algorithms Hardware encryption engine, supports AES and SHA algorithms
ECDSA/EdDSA/RSA engine
Full or partial Flash encryption
JTAG/SWD debug port password protection
Video/ISP Features
Multi-stream real-time H.265/H.264/JPEG encoding
Supports 5-megapixel (2592x1944) sensor
Supports 12bit Bayer pattern input and 8bit YUY2 input from CMOS sensor
Supports MIPI CSI-2 four data lane
CBR/VBR/CVBR/FIXQP/AVBR rate control, ROI/GDR, rotation/cropping
Supports Auto Banding, Auto Exposure, Auto White Balance
Advanced temporal and spatial noise reduction(3DNR)
Lens shading compensation/ Black level compensation and dead pixel cancellation/ horizontal lens distortion correction/ High dynamic range fusion and tone mapping for HDR sensor input
Programmable gamma table
Digital WDR
Image enhancement(brightness, contrast, saturation, hue and sharpness)
ISP tool for easy image quality tuning
Package and Reliability
QFN128 package: 10mm x 10mm
Operating voltage: 3.135V ~ 3.465V
Operating temperature: -20°C ~ 85°C
Application Scenarios
IoT doorbell
Portable AI camera
Home appliances with AIoT camera requirements
Edge AI audio-visual recognition demands
Battery-powered IoT devices